TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
119 / 204
Bit
Description
ECAT
PDI
Range [Unit]
10:8
Trigger configuration for transmission start
0002: Start when data is written into TX register
0012: Start on beginning of PWM cycle
0102: Start on center of PWM cycle
0112: Start on PWM A mark
r/w
r/w
010 . . . 710
1002: Start on PWM B mark
1012: Start on PWM A&B marks
1102: reserved
1112: Start on single trigger (Bit 15)
14:11 reserved
r/w
r/w
r/w
15
Start transfer once when this bit is set and trig- r/w
ger configuration is set to 1112
Table 133: MFC IO Register 8 – SPI_CONF
7.3.2.4 Register 9 – SPI_STATUS
Bit
0
Description
ECAT
r/-
PDI
r/-
Range [Unit]
SPI transfer done, ready for next transfer
7:1
unused
r/-
r/-
0
Table 134: MFC IO Register 9 – SPI_STATUS
7.3.2.5 Register 10 – SPI_LENGTH
Bit
Description
ECAT
PDI
Range [Unit]
5:0
SPI datagram length
-/w
-/w
010 . . . 6310 [bit]
Example: 0001112 = 8 bit datagram
Example: 1111112 = 64 bit datagram
7:6
unused
-/w
-/w
0
Table 135: MFC IO Register 10 – SPI_LENGTH
7.3.2.6 Register 11 – SPI_TIME
Bit
Description
ECAT
PDI
Range [Unit]
7:0
SPI_BIT_DURATION
-/w
-/w
010 . . . 25510
25MHz
fSP I
=
(4+(2∗SP I_BIT _DURAT ION))
Table 136: MFC IO Register 11 – SPI_TIME
©2018 TRINAMIC Motion Control GmbH & Co. KG, Hamburg, Germany
Terms of delivery and rights to technical change reserved.
Download newest version at www.trinamic.com
TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
