TMC4671 Datasheet • IC Version V1.00 | Document Revision V1.04 • 2018-Dec-11
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Address
Registername
Access
0x00000003h
cfg_dsmodulator_a
Choice
Unit
Min
Max
3
Default
0
0
0: int. dsMOD
1: ext. dsMOD with MCLK input
2: ext. dsMOD with MCLK output
3: ext. dsMOD with ext. CMP
Name
Mask
Type
Bool
Unit
0x00000004h
mclk_polarity_a
Min
0
Max
1
Default
0
0: Data is sampled on rising edge
1: Data is sampled on falling edge
Name
Mask
Type
Bool
Unit
0x00000008h
mdat_polarity_a
Min
0
Max
1
Default
0
0: MDAT is not inverted
1: MDAT is inverted
Mask
Name
Type
Bool
Unit
0x00000010h
sel_nclk_mclk_i_a
Min
0
Max
1
Default
0
0: MCLK is used (divided clock)
1: CLK (100 MHz) is used
Name
Mask
Type
0x000000FF00h
blanking_a
Unsigned
Unit
Min
0
Max
255
Default
0
Mask
Name
cfg_dsmodulator_b
Type
0x00030000h
Choice
Unit
Min
Max
3
Default
0
0
0: int. dsMOD
1: ext. dsMOD with MCLK input
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