Transcend 40-Pin IDE Flash Module
128MB ~ 8GB
Device Pausing an Ultra DMA Data-Out Burst
The device pauses an Ultra DMA Data-Out burst by following the steps lettered below. The timing
diagram is shown in below: Ultra DMA Data-Out Burst Device Pause Timing. The timing parameters are
specified in Page 12: Ultra DMA Data Burst Timing Requirements and are described in Page 13: Ultra
DMA Data Burst Timing Descriptions.
The following steps shall occur in the order they are listed unless otherwise specifically allowed:
(a) The device shall not pause an Ultra DMA data burst until at least one data word of an Ultra DMA data
burst has been transferred.
(b) The device shall pause an Ultra DMA data burst by negating -DDMARDY.
(c) The host shall stop generating HSTROBE edges within tRFS of the device negating -DDMARDY.
(d) While operating in Ultra DMA modes 2, 1, or 0 the device shall be prepared to receive zero, one or two
additional data words after negating -HDMARDY. While operating in Ultra DMA modes 4 or 3 the
device shall be prepared to receive zero, one, two or three additional data words. The additional data
words are a result of cable round trip delay and tRFS timing for the device.
(e) The device shall resume an Ultra DMA data burst by asserting -DDMARDY.
ALL WAVEFORMS IN THIS DIAGRAM ARE SHOWN WITH THE ASSERTED STATE HIGH.
NEGATIVE TRUE SIGNALS APPEAR INVERTED ON THE BUS RELATIVE TO THE DIAGRAM.
Notes:
(1) The device may negate DMARQ to request termination of the Ultra DMA data burst no sooner than tRP after -DDMARDY is
negated.
(2) After negating -DDMARDY, the device may receive zero, one, two, or three more data words from the host.
46
Transcend Information Inc.
Ver 1.7
TRANSCEND [ TRANSCEND INFORMATION. INC. ]
