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T2316162A-45 参数 Datasheet PDF下载

T2316162A-45图片预览
型号: T2316162A-45
PDF下载: 下载PDF文件 查看货源
内容描述: 1024K ×16动态RAM EDO页模式 [1024K x 16 DYNAMIC RAM EDO PAGE MODE]
分类和应用:
文件页数/大小: 13 页 / 139 K
品牌: TMT [ TAIWAN MEMORY TECHNOLOGY ]
 浏览型号T2316162A-45的Datasheet PDF文件第1页浏览型号T2316162A-45的Datasheet PDF文件第2页浏览型号T2316162A-45的Datasheet PDF文件第3页浏览型号T2316162A-45的Datasheet PDF文件第4页浏览型号T2316162A-45的Datasheet PDF文件第6页浏览型号T2316162A-45的Datasheet PDF文件第7页浏览型号T2316162A-45的Datasheet PDF文件第8页浏览型号T2316162A-45的Datasheet PDF文件第9页  
TE  
tmCH  
T2316162A  
AC ELECTRICAL CHARACTERISTICS (continued)  
AC CHARACTERISTICS  
-45  
-50  
-60  
SYM  
UNIT Notes  
PARAMETER  
MIN MAX MIN MAX MIN MAX  
Read Command Setup Time  
t
t
0
0
0
0
0
0
ns 15,18  
ns 9,15,19  
RCS  
RCH  
CAS  
RAS  
Read Command Hold Time Reference to  
Read Command Hold Time Reference to  
CAS to Output in Low-Z  
t
t
t
0
3
3
0
3
3
0
3
3
ns  
9
RRH  
CLZ  
ns 20  
15  
8
15  
8
15  
15  
ns 10,17,  
20  
CAS  
Output Buffer Turn-off Delay From  
RAS  
or OFF1  
t
t
ns 17,28  
Output Buffer Turn-off to OE  
Write Command Setup Time  
OFF2  
WCS  
0
0
0
ns 11,15,1  
8
Write Command Hold Time  
Write Command Hold Time (Reference to  
t
t
6
35  
8
38  
10  
45  
ns 15,27  
ns 15  
WCH  
WCR  
RAS  
)
Write Command Pulse Width  
t
t
6
9
8
9
15  
10  
ns 15  
ns 15  
WP  
RWL  
RAS  
CAS  
Write Command to  
Lead Time  
Lead Time  
t
8
8
10  
ns 15,19  
Write Command to  
Data-in Setup Time  
Data-in Hold Time  
CWL  
t
t
t
0
6
35  
0
8
38  
0
10  
45  
ns 12,20  
ns 12,20  
ns  
DS  
DH  
DHR  
RAS  
Data-in Hold Time (Reference to  
RAS WE  
)
t
t
t
61  
35  
27  
2.5  
64  
39  
27  
2.5  
85  
55  
40  
2.5  
ns 11  
to  
Column Address to  
CAS WE  
Delay Time  
RWD  
AWD  
CWD  
ns 11  
WE  
Delay Time  
Delay Time  
ns 11,18  
to  
Transition Time (rise or fall)  
Refresh Period (1024 cycles)  
t
t
t
50  
16  
50  
16  
50  
16  
ns 2,3  
ms  
ns  
T
REF  
RPC  
10  
10  
10  
6
10  
10  
10  
10  
10  
10  
10  
15  
RAS  
CAS  
Precharge Time  
to  
CAS Setup Time (CBR REFRESH)  
CAS  
t
t
t
ns 1,18  
ns 1,19  
ns 16  
CSR  
CHR  
OEH  
Hold Time (CBR REFRESH)  
OE  
WE  
During Read-  
Hold Time From  
Modify-Write Cycle  
t
t
t
t
5
3
2
0
5
5
5
0
5
10  
10  
0
ns  
ns  
ns  
ns  
OE  
OE  
OE  
OE  
CAS  
High Setup Time  
Low to  
OES  
CAS  
High Hold Time From  
High Pulse Width  
High  
OEHC  
OEP  
CAS  
Setup Prior to  
During Hidden  
ORD  
Refresh Cycle  
t
6
10  
10  
ns 21  
CAS  
CAS  
Last  
Going Low to First  
CLCH  
Returning High  
Data Output Hold After CAS Returning Low  
WE  
t
t
4
3
5
3
5
3
ns  
ns  
COH  
WHZ  
7
10  
15  
Output Disable Delay From  
TM Technology Inc. reserves the right  
to change products or specifications without notice.  
P. 5  
Publication Date:APR. 2002  
Revision:E