UCD8220, UCD8620
www.ti.com
SLUS652B–MARCH 2005–REVISED SEPTEMBER 2005
Reference [2] discusses the current required to drive
ture range the package must allow for the efficient
removal of the heat produced while keeping the
junction temperature within rated limits. The UCD8K
family of drivers is available in PowerPAD™ TSSOP
and QFN/DFN packages to cover a range of appli-
cation requirements. Both have an exposed pad to
enhance thermal conductivity from the semiconductor
junction.
a
power MOSFET and other capacitive-input
switching devices.
When a driver device is tested with a discrete,
capacitive load it is a fairly simple matter to calculate
the power that is required from the bias supply. The
energy that must be transferred from the bias supply
to charge the capacitor is given by:
As illustrated in Reference [3], the PowerPAD™
packages offer a leadframe die pad that is exposed at
the base of the package. This pad is soldered to the
copper on the PC board (PCB) directly underneath
the device package, reducing the θJA down to
37.47°C/W. The PC board must be designed with
thermal lands and thermal vias to complete the heat
removal subsystem, as summarized in Reference [4].
2
1
E =
x CV
2
(4)
where C is the load capacitor and V is the bias
voltage feeding the driver.
There is an equal amount of energy transferred to
ground when the capacitor is discharged. This leads
to a power loss given by the following:
2
Note that the PowerPAD™ is not directly connected
to any leads of the package. However, it is electrically
and thermally connected to the substrate which is the
ground of the device. The PowerPAD™ should be
connected to the quiet ground of the circuit.
P = CV x 1
(5)
where f is the switching frequency.
This power is dissipated in the resistive elements of
the circuit. Thus, with no external resistor between
the driver and gate, this power is dissipated inside the
driver. Half of the total power is dissipated when the
capacitor is charged, and the other half is dissipated
when the capacitor is discharged.
Circuit Layout Recommendations
In a MOSFET driver operating at high frequency, it is
critical to minimize stray inductance to minimize
overshoot/undershoot and ringing. The low output
impedance of the drivers produces waveforms with
high di/dt. This tends to induce ringing in the parasitic
inductances. It is advantageous to connect the driver
device close to the MOSFETs. It is recommended
that the PGND and the AGND pins be connected to
the PowerPAD™ of the package with a thin trace. It
is critical to ensure that the voltage potential between
these two pins does not exceed 0.3 V. The use of
schottky diodes on the outputs to PGND and PVDD is
recommended when driving gate transformers.
With VDD = 12 V, CLOAD = 2.2 nF, and f = 300 kHz,
the power loss can be calculated as:
2
P = 2.2 nF x 12 x 300 kHz = 0.095 W
(6)
With a 12-V supply, this would equate to a current of:
0.095 W
P
= 7.9 mA
=
I =
V
12 V
(7)
Thermal Information
The useful range of a driver is greatly affected by the
drive power requirements of the load and the thermal
characteristics of the device package. In order for a
power driver to be useful over a particular tempera-
25