UCD7100
SLUS651C –MARCH 2005–REVISED MAY 2010
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TERMINAL FUNCTIONS
UCD7100
PIN
I/O
FUNCTION
HTSSOP DFN-14
NAME
-14 PIN #
PIN #
Supply input pin to power the driver. The UCD7K devices accept an input range of 4.25 V to
15 V. Bypass the pin with at least 4.7 µF of capacitance.
1
1
VDD
I
I
The IN pin is a high impedance digital input capable of accepting 3.3-V logic level signals up
to 2 MHz. There is an internal Schmitt trigger comparator which isolates the internal circuitry
from any external noise.
2
2
IN
Regulated 3.3-V rail. The onboard linear voltage regulator is capable of sourcing up to 10 mA
of current. Place 0.22-µF of ceramic capacitance from the pin to ground.
3
4
3
4
3V3
O
-
AGND
Analog ground return.
Current limit flag. When the CS level is greater than the ILIM voltage minus 25 mV, the output
of the driver is forced low and the current limit flag (CLF) is set high. The CLF signal is
latched high until the UCD7K device receives the next rising edge on the IN pin.
5
5
CLF
O
Current limit threshold set pin. The current limit threshold can be set to any value between
0.25 V and 1.0 V.
6
7
8
6
7
8
ILIM
NC
I
-
I
No Connection.
Current sense pin. Fast current limit comparator connected to the CS pin is used to protect
the power stage by implementing cycle-by-cycle current limiting.
CS
Power ground return. Connect the two PGNDs together. These ground pins should be
connected very closely to the source of the power MOSFET.
9
9
PGND
PGND
-
-
Power ground return. Connect the two PGNDs together. These ground pins should be
connected very closely to the source of the power MOSFET.
10
10
11
12
11
12
OUT
OUT
O
O
The high-current TrueDrive™ driver output. Connect the two OUT pins together.
The high-current TrueDrive™ driver output. Connect the two OUT pins together.
Supply pin provides power for the output drivers. It is not connected internally to the VDD
supply rail. Connect the two PVDD pins together.
13
14
13
14
PVDD
PVDD
I
I
Supply pin provides power for the output drivers. It is not connected internally to the VDD
supply rail. Connect the two PVDD pins together.
6
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