UCC21759-Q1
SLUSEB4A – AUGUST 2020 – REVISED DECEMBER 2020
www.ti.com
7.4 Under Voltage Lockout (UVLO)
UVLO is one of the key protection features designed to protect the system in case of bias supply failures on VCC
— primary side power supply, and VDD — secondary side power supply.
7.4.1 VCC UVLO
The VCC UVLO protection details are discussed in this section. Figure 7-8 shows the timing diagram illustrating
the definition of UVLO ON/OFF threshold, deglitch filter, response time, RDY and AIN–APWM.
IN
(”IN+‘ Å ”INÅ‘)
tVCCFIL
tVCCÅ to OUT
VVCC_ON
VCC
VVCC_OFF
VDD
COM
VEE
tVCC+ to OUT
90%
VCLMPTH
OUT
10%
tVCC+ to RDY
tRDYHLD
tVCCÅ to RDY
Hi-Z
RDY
VCC
APWM
Figure 7-8. VCC UVLO Protection Timing Diagram
Copyright © 2020 Texas Instruments Incorporated
22
Submit Document Feedback
TI [ TEXAS INSTRUMENTS ]
