SLES209E
–
NOVEMBER 2007
–
REVISED OCTOBER 2011
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1.1
Features
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1.2
Description
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1.3
Applications
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1.4
Related Products
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1.5
Trademarks
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1.6
Document Conventions
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1.7
Ordering Information
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Device Details
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2.1
Functional Block Diagram
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2.2
Terminal Diagrams
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2.3
Terminal Functions
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Functional Description
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3.1
Analog Front End
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3.2
Composite Processing Block Diagram
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3.3
Adaptive Comb Filtering
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3.4
Color Low-Pass Filter
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3.5
Luminance Processing
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3.6
Chrominance Processing
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3.7
Timing Processor
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3.8
VBI Data Processor (VDP)
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3.9
VBI FIFO and Ancillary Data in Video Stream
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3.10 Raw Video Data Output
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3.11 Output Formatter
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3.12 Synchronization Signals
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Introduction
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3.14 Embedded Syncs
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3.15 I
2
C Host Interface
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3.16 Clock Circuits
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3.17 Genlock Control (GLCO) and RTC
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3.18 Reset and Power Down
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3.19 Reset Sequence
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3.20 Internal Control Registers
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3.21 Register Definitions
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Electrical Specifications
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4.1
Absolute Maximum Ratings
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4.2
Recommended Operating Conditions
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4.3
Reference Clock Specifications
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4.4
Electrical Characteristics
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4.5
DC Electrical Characteristics
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4.6
Analog Electrical Characteristics
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4.7
Clocks, Video Data, Sync Timing
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4.8
I
2
C Host Port Timing
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4.9
Thermal Specifications
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Example Register Settings
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5.1
Example 1
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5.2
Example 2
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Application Information
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6.1
Application Example
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Revision History
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3.13
Active Video (AVID) Cropping
Copyright
©
2007–2011, Texas Instruments Incorporated
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