SLES209E
–
NOVEMBER 2007
–
REVISED OCTOBER 2011
7 Revision History
Table 7-1. Revision History
REVISION
SLES209
SLES209A
Initial release
AEC-Q100 qualification added
Section 2.3, Related Products added.
Section 2.4, Trademarks modified.
Section 3.16, Figure 3.5, Changed crystal parallel resistor recommendation.
Section 3.21.9, Luminance Brightness description modified.
Section 3.21.10, Chrominance Saturation description modified.
Section 3.21.12, Luminance Contrast description modified.
SLES209B
Section 3.21.45, Status Register #3 description modified.
Section 3.21.49, CGMS-A added to register description.
Section 3.21.50, Gemstar 2x added to register description.
Section 3.21.58, Table 3-16, Recommended VBI Configuration RAM settings modifications.
Section 3.21.59, VDP Status Register modifications.
Section 6.1, Changed recommendation for resistor in parallel with the crystal.
Minor editorial changes throughout
Section 3.3, Figure 3-2, Chroma trap filter characteristics for NTSC added.
Section 3.3, Figure 3-3, Chroma trap filter characteristics for PAL added.
SLES209C
Section 3.4, Figure 3-4, Color low-pass filter characteristics added.
Section 3.8, Table 3-1, Modified name for register 1100b.
Section 3.20, Table 3-11, Added I2C indirect registers at address 21h-24h.
Section 4.9, Added Power Dissipation Ratings.
Section 3.6, Modified when color killer suppresses chrominance processing.
Section 3.21.29, Added Indirect Register Data
Section 3.21.30, Added Indirect Register Address
SLES209D
Section 3.21.31, Added Indirect Register Read/Write Strobe
Section 3.21.38, Added Patch Write Address
Section 3.21.39, Added Patch Code Execute
Section 3.21.53, Added Patch Read Address
Modified description for terminal 27
Added register 33h, modified registers 82h and 83h.
Modified description for bits 7:5 of I
2
C register 03h
SLES209E
Removed support for 1x output clock frequency (bit 0 of register 0Fh)
Modified the register description for register 82h.
Modified the register description for register 83h.
Added note concerning ESD protection. Added pulldown and pullup resistors to pin 27 output.
COMMENTS
Copyright
©
2007–2011, Texas Instruments Incorporated
Revision History
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