TSC2007-Q1
www.ti.com
SBAS545 –SEPTEMBER 2011
PIN CONFIGURATION
PW PACKAGE
TSSOP-16
(TOP VIEW)
AUX
NC
VDD/REF
X+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A0
Y+
A1
X-
TSC2007
SCL
SDA
PENIRQ
NC
Y-
GND
NC
NC
PIN ASSIGNMENTS
PIN NO.
PIN NAME
VDD/REF
X+
I/O
A/D DESCRIPTION
1
2
Supply voltage and external reference input
X+ channel input
Y+ channel input
X– channel input
Y– channel input
Ground
I
I
I
I
A
A
A
A
3
Y+
4
X–
5
Y–
6
GND
NC
7
No connection
8
NC
No connection
9
NC
No connection
10
11
PENIRQ
SDA
O
D
D
Data available interrupt output. A delayed (process delay) pen touch detect. Pin polarity with active low.
Serial data I/O
I/O
Serial clock. This pin is normally an input, but acts as an output when the device stretches the clock to delay a bus
transfer.
12
SCL
I/O
D
13
14
15
16
A1
A0
I
I
D
D
Address input bit 1
Address input bit 0
No connection
NC
AUX
I
A
Auxiliary channel input
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