TPS7H5005-SEP, TPS7H5006-SEP, TPS7H5007-SEP, TPS7H5008-SEP
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SLVSGG1 – FEBRUARY 2022
1
fESR
=
2 × COUT × ESR
(85)
1
fESR
=
= 80.73 kHz
2 × 2.3 mF × 0.86 m
(86)
1
CHF
=
2 × RCOMP × fESR
(87)
(88)
1
CHF
=
= 49.04 pF
2 × 40.2 k × 80.73 kHz
The values of RCOMP, CCOMP, and CHF selected were 40.2 kΩ, 15 nF, and 47 pF, respectively. Note that like
many other aspects of the design, the frequency compensation is often tuned during testing in order to obtain the
best possible performance.
9.2.2.15 Slope Compensation Resistor
The slope compensation for the converter should be tailored by using the RSC pin of the TPS7H500x-SEP.
As recommended in Section 8.3.17, the slope compensation should be set to be equal to the falling slope of
the output inductor in order to optimize sub-harmonic damping. The slope compensation that is calculated is
dependent on the transformer turns ratio, current sense turns ratio, output inductor and current sense resistor
that have been selected for the push-pull design.
VOUT NS NCSP
×
SC =
×
× RCS
L
NP NCSS
(89)
5 V
1
1
V
× 7.5 = 319148.94 = 0.319
V
SC =
×
×
0.47 H 2.5 100
s
s
(90)
(91)
(92)
28.3
RSC =
SC1.1
28.3
0.3191.1
RSC =
= 99.4 kΩ
A resistor value of 102 kΩ is connected between RSC and AVSS for the design.
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