TPS54310-EP
www.ti.com ..................................................................................................................................................................................................... SLVS818–APRIL 2008
6 PL
4 PL
0.0130
0.0180
Minimum Recommended Thermal Vias: 6 × .013 dia.
Inside Powerpad Area 4 × .018 dia. Under Device as Shown.
Additional .018 dia. Vias May be Used if Top Side Analog
Ground Area is Extended.
Connect Pin 1 to Analog Ground Plane
in This Area for Optimum Performance
0.0150
0.06
0.0227
0.0600
0.0400
0.2560
0.2454
0.1010
0.0400
0.0600
0.0256
0.1700
0.1340
0.0620
0.0400
Minimum Recommended Exposed
Copper Area For Powerpad. 5mm
Stencils may Require 10 Percent
Larger Area
Minimum Recommended Top
Side Analog Ground Area
Figure 12. Recommended Land Pattern for 20-Pin PWP PowerPAD
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): TPS54310-EP