TPS54383, TPS54386
www.ti.com
SLUS774B–AUGUST 2007–REVISED OCTOBER 2007
An R-C connected to an ENx pin may be used to delay the turn-on of the associated output after power is
applied to PVDDx (see Figure 16). After power is applied to PVDD2, the voltage on the ENx pin slowly decays
towards ground. Once the voltage decays to approximately 1.2 V, then the output is enabled and the startup
sequence begins. If it is desired to enable the outputs of the device immediately upon the application of power to
PVDD2, then omit these two components and tie the ENx pin to GND directly.
If an R-C circuit is used to delay the turn-on of the output, the resistor value must be much less than 1.2 V / 6µA
or 200 kΩ. A suggested value is 51 kΩ. This resistor value allows the ENx voltage to decay below the 1.2-V
threshold while the 6-µA bias current flows.
The capacitor value required to delay the startup time (after the application of PVDD2) is shown in Equation 1.
t
DELAY
C =
farads
æ
ç
è
ö
÷
ø
V
- 2´I
´R
ENx
IN
R ´ ln
V
-I
´R
TH ENx
(1)
where:
•
•
•
R and C are the timing components
VTH is the 1.2-V enable threshold voltage
IENx is the 6 µA enable pin biasing current
Other enable pin functionality is dictated by the state of the SEQ pin. (See the Output Voltage Sequencing
section.)
PVDD2
6 mA
C
ENx
PVDDx
PVDDx
1.2-V
Threshold
+
1.2 V
R
ENx
TPS5438x
V
OUTx
0
t
t
+ t
DELAY
DELAY SS
T - Time
Figure 17. Startup Delay with R-C on Enable
Figure 16. Startup Delay Schematic
DESIGN HINT
If delayed output voltage startup is not necessary, simply connect EN1 and EN2 to
GND. This configuration allows the outputs to start immediately on valid application of
PVDD2.
If ENx is allowed to go high after the Outputx has been in regulation, the upper MOSFET shuts off, and the
output decays at a rate determined by the output capacitor and the load. The internal pulldown MOSFET remains
in the OFF state. (See the Bootstrap for N-Channel MOSFET section.)
Copyright © 2007, Texas Instruments Incorporated
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