TPS54383, TPS54386
www.ti.com
SLUS774B–AUGUST 2007–REVISED OCTOBER 2007
BLOCK DIAGRAM
2
1
BOOT1
PVDD1
BP
CLK1
Level
Shift
Current
f(I
) + DC(ofst)
Comparator
DRAIN1
S
Q
Q
+
R
R
GND
FB1
4
7
+
f(I
)
DRAIN1
Overcurrent Comp
3
SW1
+
0.8 V
REF
R
COMP
BP
f(I
)
f(I
)
SLOPE1
MAX1
Weak
Soft Start
SD1
CLK1
Pull-Down
MOSFET
C
1
Anti-Cross
Conduction
COMP
VDD2
f(I
)
SLOPE1
Ramp
Gen 1
TSD
CLK1
1.2 MHz
Oscilator
Divide
by 2/4
6 mA
6 mA
f(I
)
SLOPE2
Ramp
Gen 2
EN1
EN2
5
6
SD1
Internal
Control
SD2
CLK2
UVLO
150 kW
SEQ 10
BP
FB1
FB2
Output
Undervoltage
Detect
150 kW
CLK2
13 BOOT2
14 PVDD2
BP
Level
Shift
Current
Comparator
FET
f(I
) + DC(ofst)
DRAIN2
Switch
S
R
R
Q
Q
+
GND
FB2
4
8
+
f(I
)
DRAIN2
Overcurrent Comp
12 SW2
+
0.8 V
REF
R
COMP
BP
f(I
)
f(I
)
SLOPE2
MAX2
Weak
Soft Start
2
SD2
CLK2
Pull-Down
MOSFET
C
Anti-Cross
Conduction
COMP
5.25-V
BP 11
PVDD2
Regulator
150 kW
BP
Level
Select
ILIM2
9
150 kW
0.8 V
REF
References
I
(Set to one of three limits)
MAX2
UDG-07124
Copyright © 2007, Texas Instruments Incorporated
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