August 1994
TP3054, TP3057
‘‘Enhanced’’ Serial Interface
CODEC/Filter COMBO Family
É
General Description
Features
Y
Complete CODEC and filtering system (COMBO)
including:
The TP3054, TP3057 family consists of m-law and A-law
monolithic PCM CODEC/filters utilizing the A/D and D/A
conversion architecture shown inFigure 1, and a serial PCM
interface. The devices are fabricated using National’s ad-
vanced double-poly CMOS process (microCMOS).
Ð Transmit high-pass and low-pass filtering
Ð Receive low-pass filter with sin x/x correction
Ð Active RC noise filters
Ð m-law or A-law compatible COder and DECoder
Ð Internal precision voltage reference
Ð Serial I/O interface
The encode portion of each device consists of an input gain
adjust amplifier, an active RC pre-filter which eliminates very
high frequency noise prior to entering a switched-capacitor
band-pass filter that rejects signals below 200 Hz and above
3400 Hz. Also included are auto-zero circuitry and a com-
panding coder which samples the filtered signal and en-
codes it in the companded m-law or A-law PCM format. The
decode portion of each device consists of an expanding
decoder, which reconstructs the analog signal from the
companded m-law or A-law code, a low-pass filter which
corrects for the sin x/x response of the decoder output and
rejects signals above 3400 Hz followed by a single-ended
power amplifier capable of driving low impedance loads.
The devices require two 1.536 MHz, 1.544 MHz or 2.048
MHz transmit and receive master clocks, which may be
asynchronous; transmit and receive bit clocks, which may
vary from 64 kHz to 2.048 MHz; and transmit and receive
frame sync pulses. The timing of the frame sync pulses and
PCM data is compatible with both industry standard formats.
Ð Internal auto-zero circuitry
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
m-law, 16-pinÐTP3054
A-law, 16-pinÐTP3057
Designed for D3/D4 and CCITT applications
g
5V operation
Low operating powerÐtypically 50 mW
Power-down standby modeÐtypically 3 mW
Automatic power-down
TTL or CMOS compatible digital interfaces
Maximizes line interface card circuit density
Dual-In-Line or surface mount packages
See also AN-370, ‘‘Techniques for Designing with
CODEC/Filter COMBO Circuits’’
Connection Diagrams
Dual-In-Line Package
Plastic Chip Carriers
TL/H/5510–1
Top View
TL/H/5510–10
Order Number TP3054J or TP3057J
See NS Package Number J16A
Top View
Order Number TP3057V
See NS Package Number V20A
Order Number TP3054N or TP3057N
See NS Package Number N16A
Order Number TP3054WM or TP3057WM
See NS Package Number M16B
COMBOÉ and TRI-STATEÉ are registered trademarks of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/H/5510
RRD-B30M125/Printed in U. S. A.
TI [ TEXAS INSTRUMENTS ]
