欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMS320F2808PZA 参数 Datasheet PDF下载

TMS320F2808PZA图片预览
型号: TMS320F2808PZA
PDF下载: 下载PDF文件 查看货源
内容描述: 数字信号处理器 [Digital Signal Processors]
分类和应用: 数字信号处理器
文件页数/大小: 145 页 / 1496 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TMS320F2808PZA的Datasheet PDF文件第48页浏览型号TMS320F2808PZA的Datasheet PDF文件第49页浏览型号TMS320F2808PZA的Datasheet PDF文件第50页浏览型号TMS320F2808PZA的Datasheet PDF文件第51页浏览型号TMS320F2808PZA的Datasheet PDF文件第53页浏览型号TMS320F2808PZA的Datasheet PDF文件第54页浏览型号TMS320F2808PZA的Datasheet PDF文件第55页浏览型号TMS320F2808PZA的Datasheet PDF文件第56页  
SPRS230M – OCTOBER 2003 – REVISED MARCH 2011
www.ti.com
3.7
Low-Power Modes Block
The low-power modes on the 280x are similar to the 240x devices.
summarizes the various
modes.
Table 3-18. Low-Power Modes
MODE
IDLE
STANDBY
HALT
(1)
(2)
(3)
LPMCR0(1:0)
00
01
1X
OSCCLK
On
On
(watchdog still running)
Off
(oscillator and PLL turned off,
watchdog not functional)
CLKIN
On
Off
Off
SYSCLKOUT
On
(2)
Off
Off
EXIT
(1)
XRS, Watchdog interrupt, any enabled
interrupt, XNMI
XRS, Watchdog interrupt, GPIO Port A
signal, debugger
(3)
, XNMI
XRS, GPIO Port A signal, XNMI,
debugger
(3)
The Exit column lists which signals or under what conditions the low power mode will be exited. A low signal, on any of the signals, will
exit the low power condition. This signal must be kept low long enough for an interrupt to be recognized by the device. Otherwise the
IDLE mode will not be exited and the device will go back into the indicated low power mode.
The IDLE mode on the C28x behaves differently than on the 24x/240x. On the C28x, the clock output from the CPU (SYSCLKOUT) is
still functional while on the 24x/240x the clock is turned off.
On the C28x, the JTAG port can still function even if the CPU clock (CLKIN) is turned off.
The various low-power modes operate as follows:
IDLE Mode:
This mode is exited by any enabled interrupt or an XNMI that is recognized
by the processor. The LPM block performs no tasks during this mode as
long as the LPMCR0(LPM) bits are set to 0,0.
Any GPIO port A signal (GPIO[31:0]) can wake the device from STANDBY
mode. The user must select which signal(s) will wake the device in the
GPIOLPMSEL register. The selected signal(s) are also qualified by the
OSCCLK before waking the device. The number of OSCCLKs is specified in
the LPMCR0 register.
Only the XRS and any GPIO port A signal (GPIO[31:0]) can wake the
device from HALT mode. The user selects the signal in the GPIOLPMSEL
register.
NOTE
The low-power modes do not affect the state of the output pins (PWM pins included). They
will be in whatever state the code left them in when the IDLE instruction was executed. See
the
TMS320x280x, 2801x, 2804x DSP System Control and Interrupts Reference Guide
(literature number
for more details.
STANDBY Mode:
HALT Mode:
52
Functional Overview
Copyright © 2003–2011, Texas Instruments Incorporated
Product Folder Link(s):