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TMS320VC5402PGER10 参数 Datasheet PDF下载

TMS320VC5402PGER10图片预览
型号: TMS320VC5402PGER10
PDF下载: 下载PDF文件 查看货源
内容描述: 定点数字信号处理器 [FIXED-POINT DIGITAL SIGNAL PROCESSOR]
分类和应用: 数字信号处理器
文件页数/大小: 68 页 / 939 K
品牌: TI [ TEXAS INSTRUMENTS ]
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T M S3 2 0 VC5 402  
F I X ED ĆPOI N T DI G I TAL S I GN AL PRO CE SSO R  
SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000  
memory  
The ’5402 device provides both on-chip ROM and RAM memories to aid in system performance and integration.  
on-chip ROM with bootloader  
The ’5402 features a 4K-word × 16-bit on-chip maskable ROM. Customers can arrange to have the ROM of the  
’5402 programmed with contents unique to any particular application. A security option is available to protect  
a custom ROM. This security option is described in the TMS320C54x DSP CPU and Peripherals Reference Set,  
Volume 1 (literature number SPRU131). Note that only the ROM security option, and not the ROM/RAM option,  
is available on the ’5402 .  
A bootloader is available in the standard ’5402 on-chip ROM. This bootloader can be used to automatically  
transfer user code from an external source to anywhere in the program memory at power up. If the MP/MC pin  
is sampled low during a hardware reset, execution begins at location FF80h of the on-chip ROM. This location  
contains a branch instruction to the start of the bootloader program. The standard ’5402 bootloader provides  
different ways to download the code to accomodate various system requirements:  
D
D
D
D
Parallel from 8-bit or 16-bit-wide EPROM  
Parallel from I/O space 8-bit or 16-bit mode  
Serial boot from serial ports 8-bit or 16-bit mode  
Host-port interface boot  
The standard on-chip ROM layout is shown in Table 1.  
Table 1. Standard On-Chip ROM Layout  
ADDRESS RANGE  
DESCRIPTION  
F000h – F7FFh  
Reserved  
F800h – FBFFh  
FC00h – FCFFh  
FD00h – FDFFh  
FE00h – FEFFh  
FF00h – FF7Fh  
FF80h – FFFFh  
Bootloader  
µ-law expansion table  
A-law expansion table  
Sine look-up table  
Reserved  
Interrupt vector table  
In the ’VC5402 ROM, 128 words are reserved for factory device-testing purposes. Application  
code to be implemented in on-chip ROM must reserve these 128 words at addresses  
FF00h–FF7Fh in program space.  
on-chip RAM  
The ’5402 device contains 16K × 16-bit of on-chip dual-access RAM (DARAM). The DARAM is composed of  
two blocks of 8K words each. Each block in the DARAM can support two reads in one cycle, or a read and a  
write in one cycle. The DARAM is located in the address range 0060h–3FFFh in data space, and can be mapped  
into program/data space by setting the OVLY bit to one.  
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