TMS320VC5420
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS080C – MARCH 1999 – REVISED APRIL 2000
16-bit bidirectional host-port interface (HPI16) (continued)
Some of the features of the HPI16 include:
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16-bit bidirectional data bus
Multiple data strobes and control signals to allow glueless interfacing to a variety of hosts
Multiplexed and nonmultiplexed address/data modes
18-bit address bus used in nonmultiplexed mode to allow access to all internal memory (including internal
extended address pages)
18-bit address register used in multiplexed mode. Includes address autoincrement feature for faster
accesses to sequential addresses
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Interface to on-chip DMA module to allow access to entire internal memory space
HRDY signal to hold off host accesses due to DMA latency
Control register available in multiplexed mode only. Accessible by either host or DSP to provide host/DSP
interrupts, extended addressing, and data prefetch capability
The HPI16 acts as a slave to a 16-bit host processor and allows access to the on-chip memory of the DSP. There
are two modes of operation as determined by the HMODE signal: multiplexed mode and nonmultiplexed mode.
HPI multiplexed mode
Inmultiplexedmode, HPI16operationisverysimilartothestandard8-bitHPI, whichisavailablewithother’C54x
products. A host with a multiplexed address/data bus can access the HPI16 data register (HPID), address
register (HPIA), or control register (HPIC) via the HD bidirectional data bus. The host initiates the access with
the strobe signals (HDS1, HDS2, HCS) and controls the type of access with the HCNTL, HR/W, and HAS
signals. The DSP can interrupt the host via the HINT signal, and can stall host accesses via the HRDY signal.
host/DSP interrupts
In multiplexed mode, the HPI16 offers the capability for the host and DSP to interrupt each other through the
HPIC register.
For host-to-DSP interrupts, the host must write a “1” to the DSPINT bit of the HPIC register. This generates an
interrupt to the DSP. This interrupt can also be used to wake the DSP from any of the IDLE 1,2, or 3 states. Note
that the DSPINT bit is always read as “0” by both the host and DSP.
For DSP-to-host interrupts, the DSP must write a “1” to the HINT bit of the HPIC register to interrupt the host
via the HINT pin. The host acknowledges and clear this interrupt by also writing a “1” to the HINT bit of the HPIC
register. Note that writing a “0” to the HINT bit by either host or DSP has no effect.
HPI nonmultiplexed mode
In nonmultiplexed mode, a host with separate address/data buses can access the HPI16 data register (HPID)
via the HD 16-bit bidirectional data bus, and the address register (HPIA) via the 18-bit HA address bus. The host
initiates the access with the strobe signals (HDS1, HDS2, HCS) and controls the direction of the access with
the HR/W signal. The HPI16 can stall host accesses via the HRDY signal. Note that the HPIC register is not
available in nonmultiplexed mode since there are no HCNTL signals available. All host accesses initiate a DMA
read or write access.
other HPI16 system considerations
operation during IDLE2
The HPI16 can continue to operate during IDLE1 or IDLE2 by using special clock management logic that turns
on relevant clocks to perform a synchronous memory access, and then turns the clocks back off to save power.
The DSP CPU does not wake up from the IDLE mode during this process.
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