ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉꢄ ꢅ
ꢑ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢒ
ꢀ
ꢎ
ꢋ
ꢓꢋ
ꢀꢔ
ꢕ
ꢂ
ꢋ
ꢓꢒ
ꢔ
ꢕ
ꢐ
ꢖ
ꢑ
ꢇ
ꢍ
ꢂ
ꢂ
ꢑ
ꢖ
SPRS080F − MARCH 1999 − REVISED OCTOBER 2008
functional overview
P, C, D, E Buses and Control Signals
48K Prog/Data
32K
Program
SARAM
16K Prog/Data
DARAM
C54x Core A
SARAM
DMA Bus
GPIO[3:0]
McBSP0
Peripheral
Bus
Bridge
Peripheral Bus
CPU BUS
McBSP1
McBSP2
Modified HPI16
Host Access Bus
DMA
(6 channels)
TIMER
APLL
JTAG
Clocks
DSP Subsystem A
Core-to-Core
FIFO Interface
Interprocessor IRQ’s
P, C, D, E Buses and Control Signals
32K
Program
SARAM
48K Prog/Data
SARAM
16K Prog/Data
DARAM
C54x Core B
DMA Bus
GPIO[3:0]
McBSP0
Peripheral
Bus
Bridge
Peripheral Bus
CPU Bus
McBSP1
McBSP2
Modified HPI16
Host Access Bus
DMA
(6 channels)
TIMER
JTAG
DSP Subsystem B
Figure 1. Functional Block Diagram
C54x is a trademark of Texas Instruments.
16
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
TI [ TEXAS INSTRUMENTS ]
