Functional Overview
3.19 Interrupts
Vector-relative locations and priorities for all internal and external interrupts are shown in Table 3–27.
Table 3–27. Interrupt Locations and Priorities
NAME
RS, SINTR
NMI, SINT16
SINT17
SINT18
SINT19
SINT20
SINT21
SINT22
SINT23
SINT24
SINT25
SINT26
SINT27
SINT28
SINT29
SINT30
INT0, SINT0
INT1, SINT1
INT2, SINT2
TINT0, SINT3
BRINT0, SINT4
BXINT0, SINT5
BRINT2, SINT6
BXINT2, SINT7
INT3, TINT1, SINT8
HINT, SINT9
BRINT1, SINT10
BXINT1, SINT11
DMAC4,SINT12
DMAC5,SINT13
UART, SINT14
LOCATION
DECIMAL
HEX
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
64
68
72
76
80
84
88
92
96
100
104
108
112
116
120
00
04
08
0C
10
14
18
1C
20
24
28
2C
30
34
38
3C
40
44
48
4C
50
54
58
5C
60
64
68
6C
70
74
78
PRIORITY
1
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
4
5
6
7
8
9
10
11
12
13
14
15
16
—
FUNCTION
Reset (hardware and software reset)
Nonmaskable interrupt
Software interrupt #17
Software interrupt #18
Software interrupt #19
Software interrupt #20
Software interrupt #21
Software interrupt #22
Software interrupt #23
Software interrupt #24
Software interrupt #25
Software interrupt #26
Software interrupt #27
Software interrupt #28
Software interrupt #29
Software interrupt #30
External user interrupt #0
External user interrupt #1
External user interrupt #2
Timer 0 interrupt
McBSP #0 receive interrupt
McBSP #0 transmit interrupt
McBSP #2 receive interrupt (default)†
McBSP #2 transmit interrupt (default)†
External user interrupt #3/Timer 1 interrupt‡
HPI interrupt
McBSP #1 receive interrupt (default)†
McBSP #1 transmit interrupt (default)†
DMA channel 4
DMA channel 5
UART interrupt
Reserved
124–127
7C–7F
—
Reserved
† See Table 3–13 for other interrupt selections.
‡ The INT3 and TINT1 interrupts are ORed together. To distinguish one from the other, one of these two interrupt sources must be inhibited.
54
SPRS007B
November 2001 – Revised July 2003
TI [ TEXAS INSTRUMENTS ]
