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TMS320VC5402ZGU100 参数 Datasheet PDF下载

TMS320VC5402ZGU100图片预览
型号: TMS320VC5402ZGU100
PDF下载: 下载PDF文件 查看货源
内容描述: 定点数字信号处理器 [FIXED-POINT DIGITAL SIGNAL PROCESSOR]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置时钟
文件页数/大小: 68 页 / 933 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320VC5402
FIXED POINT DIGITAL SIGNAL PROCESSOR
SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000
absolute maximum ratings over specified temperature range (unless otherwise noted)
Supply voltage I/O range, DV
DD
‡ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 4.0 V
Supply voltage core range, CV
DD‡
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 2.4 V
Input voltage range, V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 4.5 V
Output voltage range, V
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 4.5 V
Operating case temperature range, T
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 100°C
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ All voltage values are with respect to VSS.
recommended operating conditions
MIN
DVDD
CVDD
VSS
Device supply voltage, I/O§
Device supply voltage, core§
Supply voltage, GND
RS, INTn, NMI, BIO, BCLKR0, BCLKR1,
BCLKX0, BCLKX1, HCS, HDS1, HDS2, TDI,
TMS, CLKMDn
X2/CLKIN¶
TCK, TRST
All other inputs
RS, INTn, NMI, X2/CLKIN¶, BIO, BCLKR0,
BCLKR1, BCLKX0, BCLKX1, HCS, HDS1,
HDS2, TCK, CLKMDn
All other inputs
IOH
IOL
High-level output current
Low-level output current
2.2
1.35
2.5
2
–0.3
–0.3
3
1.71
NOM
3.3
1.8
0
DVDD + 0.3
CVDD+0.3
DVDD + 0.3
DVDD + 0.3
0.6
0.8
–300
1.5
µA
mA
V
MAX
3.6
1.98
UNIT
V
V
V
VIH
High-level
High level input voltage
DVDD = 3.3"0.3 V
VIL
Low-level input voltage
DVDD = 3.3"0.3 V
V
TC
Operating case temperature
–40
100
°C
§ Texas Instrument DSPs do not require specific power sequencing between the core supply and the I/O supply. However, systems should be
designed to ensure that neither supply is powered up for extended periods of time if the other supply is below the proper operating voltage.
Excessive exposure to these conditions can adversely affect the long term reliability of the devices. System-level concerns such as bus contention
may require supply sequencing to be implemented. In this case, the core supply should be powered up at the same time as or prior to the I/O
buffers and then powered down after the I/O buffers.
¶ All revisions of the ’5402 can be operated with an external clock source, provided that the proper voltage levels be driven on the X2/CLKIN pin.
It should be noted that the X2/CLKIN pin is referenced to the device 1.8V power supply (CVdd), rather than the 3V I/O supply (DVdd). Refer to
the recommended operating conditions section of this document for the allowable voltage levels of the X2/CLKIN pin.
34
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443