SPRS439M – JUNE 2007 – REVISED AUGUST 2012
List of Tables
2-1
2-2
2-3
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
3-19
3-20
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
4-18
4-19
5-1
6-1
6-2
6-3
6-4
....................................................................................................
F2823x Hardware Features
....................................................................................................
Signal Descriptions
...............................................................................................................
Addresses of Flash Sectors in F28335, F28235
............................................................................
Addresses of Flash Sectors in F28334, F28234
.............................................................................
Addresses of Flash Sectors in F28332, F28232
.............................................................................
Handling Security Code Locations
.............................................................................................
Wait-states
........................................................................................................................
Boot Mode Selection
.............................................................................................................
Peripheral Bootload Pins
........................................................................................................
Peripheral Frame 0 Registers
..................................................................................................
Peripheral Frame 1 Registers
..................................................................................................
Peripheral Frame 2 Registers
..................................................................................................
Peripheral Frame 3 Registers
..................................................................................................
Device Emulation Registers
.....................................................................................................
PIE Peripheral Interrupts
.......................................................................................................
PIE Configuration and Control Registers
......................................................................................
External Interrupt Registers
.....................................................................................................
PLL, Clocking, Watchdog, and Low-Power Mode Registers
...............................................................
PLL Settings
......................................................................................................................
CLKIN Divide Options
...........................................................................................................
Possible PLL Configuration Modes
............................................................................................
Low-Power Modes
...............................................................................................................
CPU-Timers 0, 1, 2 Configuration and Control Registers
...................................................................
ePWM Control and Status Registers (Default Configuration in PF1)
......................................................
ePWM Control and Status Registers (Remapped Configuration in PF3 - DMA-Accessible)
...........................
eCAP Control and Status Registers
...........................................................................................
eQEP Control and Status Registers
...........................................................................................
ADC Registers
...................................................................................................................
McBSP Register Summary
......................................................................................................
3.3-V eCAN Transceivers
......................................................................................................
CAN Register Map
..............................................................................................................
SCI-A Registers
..................................................................................................................
SCI-B Registers
..................................................................................................................
SCI-C Registers
.................................................................................................................
SPI-A Registers
...................................................................................................................
I2C-A Registers
...................................................................................................................
GPIO Registers
.................................................................................................................
GPIO-A Mux Peripheral Selection Matrix
...................................................................................
GPIO-B Mux Peripheral Selection Matrix
...................................................................................
GPIO-C Mux Peripheral Selection Matrix
...................................................................................
XINTF Configuration and Control Register Mapping
.......................................................................
TMS320x2833x, 2823x Peripheral Selection Guide
.......................................................................
TMS320F28335/F28235 Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT
.................
TMS320F28334/F28234 Current Consumption by Power-Supply Pins at 150-MHz SYSCLKOUT
.................
Typical Current Consumption by Various Peripherals (at 150 MHz)
....................................................
Clocking and Nomenclature (150-MHz Devices)
...........................................................................
F2833x Hardware Features
List of Tables
7
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