TMS320F28335, TMS320F28334, TMS320F28332
TMS320F28235, TMS320F28234, TMS320F28232
Digital Signal Controllers (DSCs)
www.ti.com
SPRS439C–JUNE 2007–REVISED FEBRUARY 2008
Table 6-35. SPI Slave Mode External Timing (Clock Phase = 1) (continued)
NO.
MIN
0.75tc(SPC)S
MAX UNIT
tv(SPCL-SOMI)S
Valid time, SPISOMI data valid after SPICLK high
(clock polarity = 1)
ns
21 tsu(SIMO-SPCH)S
tsu(SIMO-SPCL)S
Setup time, SPISIMO before SPICLK high (clock polarity = 0)
Setup time, SPISIMO before SPICLK low (clock polarity = 1)
35
35
ns
ns
ns
22 tv(SPCH-SIMO)S
Valid time, SPISIMO data valid after SPICLK high
(clock polarity = 0)
0.5tc(SPC)S-10
tv(SPCL-SIMO)S
Valid time, SPISIMO data valid after SPICLK low (clock polarity =
1)
0.5tc(SPC)S-10
ns
12
SPICLK
(clock polarity = 0)
13
14
SPICLK
(clock polarity = 1)
17
18
SPISOMI
SPISIMO
SPISOMI Data Is Valid
Data Valid
21
22
SPISIMO Data
Must Be Valid
(A)
SPISTE
A. In the slave mode, the SPISTE signal should be asserted low at least 0.5tc(SPC) before the valid SPI clock edge and
remain low for at least 0.5tc(SPC) after the receiving edge (SPICLK) of the last data bit.
Figure 6-21. SPI Slave Mode External Timing (Clock Phase = 1)
6.10.7 External Interface (XINTF) Timing
Each XINTF access consists of three parts: Lead, Active, and Trail. The user configures the
Lead/Active/Trail wait states in the XTIMING registers. There is one XTIMING register for each XINTF
zone. Table 6-36 shows the relationship between the parameters configured in the XTIMING register and
the duration of the pulse in terms of XTIMCLK cycles.
Table 6-36. Relationship Between Parameters Configured in XTIMING and Duration of Pulse
DESCRIPTION
DURATION (ns)(1)(2)
X2TIMING = 0
X2TIMING = 1
(XRDLEAD × 2) × tc(XTIM)
LR
AR
TR
Lead period, read access
Active period, read access
Trail period, read access
XRDLEAD × tc(XTIM)
(XRDACTIVE + WS + 1) × tc(XTIM)
XRDTRAIL × tc(XTIM)
(XRDACTIVE × 2 + WS + 1) × tc(XTIM)
(XRDTRAIL × 2) × tc(XTIM)
(1) tc(XTIM) – Cycle time, XTIMCLK
(2) WS refers to the number of wait states inserted by hardware when using XREADY. If the zone is configured to ignore XREADY
(USEREADY = 0), then WS = 0.
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Electrical Specifications
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