TMS320DM6437
Digital Media Processor
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SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
Table 6-7. DM6437 EDMA Registers (continued)
HEX ADDRESS
ACRONYM
SASRCBREF
SADSTBREF
-
REGISTER NAME
0x01C1 0A5C
0x01C1 0A60
EDMA3 TC2 Source Active Source Address B-Reference Register
EDMA3 TC2 Source Active Destination Address B-Reference Register
Reserved
0x01C1 0A64 - 0x01C1 0A7F
0x01C1 0A80
DFCNTRLD
DFSRCBREF
EDMA3 TC2 Destination FIFO Set Count Reload Register
EDMA3 TC2 Destination FIFO Set Source Address B-Reference Register
0x01C1 0A84
EDMA3 TC2 Destination FIFO Set Destination Address B-Reference
Register
0x01C1 0A88
DFDSTBREF
0x01C1 0A8C - 0x01C1 0AFF
0x01C1 0B00
-
Reserved
DFOPT0
DFSRC0
DFCNT0
DFDST0
DFBIDX0
DFMPPRXY0
-
EDMA3 TC2 Destination FIFO Options Register 0
EDMA3 TC2 Destination FIFO Source Address Register 0
EDMA3 TC2 Destination FIFO Count Register 0
EDMA3 TC2 Destination FIFO Destination Address Register 0
EDMA3 TC2 Destination FIFO B-Index Register 0
EDMA3 TC2 Destination FIFO Memory Protection Proxy Register 0
Reserved
0x01C1 0B04
0x01C1 0B08
0x01C1 0B0C
0x01C1 0B10
0x01C1 0B14
0x01C1 0B18 - 0x01C1 0B3F
0x01C1 0B40
DFOPT1
DFSRC1
DFCNT1
DFDST1
DFBIDX1
DFMPPRXY1
-
EDMA3 TC2 Destination FIFO Options Register 1
EDMA3 TC2 Destination FIFO Source Address Register 1
EDMA3 TC2 Destination FIFO Count Register 1
EDMA3 TC2 Destination FIFO Destination Address Register 1
EDMA3 TC2 Destination FIFO B-Index Register 1
EDMA3 TC2 Destination FIFO Memory Protection Proxy Register 1
Reserved
0x01C1 0B44
0x01C1 0B48
0x01C1 0B4C
0x01C1 0B50
0x01C1 0B54
0x01C1 0B58 - 0x01C1 0B7F
0x01C1 0B80
DFOPT2
DFSRC2
DFCNT2
DFDST2
DFBIDX2
DFMPPRXY2
-
EDMA3 TC2 Destination FIFO Options Register 2
EDMA3 TC2 Destination FIFO Source Address Register 2
EDMA3 TC2 Destination FIFO Count Register 2
EDMA3 TC2 Destination FIFO Destination Address Register 2
EDMA3 TC2 Destination FIFO B-Index Register 2
EDMA3 TC2 Destination FIFO Memory Protection Proxy Register 2
Reserved
0x01C1 0B84
0x01C1 0B88
0x01C1 0B8C
0x01C1 0B90
0x01C1 0B94
0x01C1 0B98 - 0x01C1 0BBF
0x01C1 0BC0
DFOPT3
DFSRC3
DFCNT3
DFDST3
DFBIDX3
DFMPPRXY3
-
EDMA3 TC2 Destination FIFO Options Register 3
EDMA3 TC2 Destination FIFO Source Address Register 3
EDMA3 TC2 Destination FIFO Count Register 3
EDMA3 TC2 Destination FIFO Destination Address Register 3
EDMA3 TC2 Destination FIFO B-Index Register 3
EDMA3 TC2 Destination FIFO Memory Protection Proxy Register 3
Reserved
0x01C1 0BC4
0x01C1 0BC8
0x01C1 0BCC
0x01C1 0BD0
0x01C1 0BD4
0x01C1 0BD8 - 0x01C1 0BFF
Table 6-8 shows an abbreviation of the set of registers which make up the parameter set for each of 128
EDMA events. Each of the parameter register sets consist of 8 32-bit word entries. Table 6-9 shows the
parameter set entry registers with relative memory address locations within each of the parameter sets.
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