TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
www.ti.com
Table 2-2
Memory Map Summary (Part 6 of 7)
Logical 32-bit Address
Physical 36-bit Address
Start
End
Start
End
Bytes
512K
512K
5M
Description
CorePac3 L2 SRAM
Reserved
13800000
13880000
13900000
13E00000
13E08000
13F00000
13F08000
14800000
14880000
14900000
14E00000
14E08000
14F00000
14F08000
15800000
15880000
15900000
15E00000
15E08000
15F00000
15F08000
16800000
16880000
16900000
16E00000
16E08000
16F00000
16F08000
17800000
17880000
17900000
17E00000
17E08000
17F00000
17F08000
20000000
20100000
20B00000
20B20000
20BF0000
20BF0200
20C00000
20C00100
1387FFFF
138FFFFF
13DFFFFF
13E07FFF
13EFFFFF
13F07FFF
147FFFFF
1487FFFF
148FFFFF
14DFFFFF
14E07FFF
14EFFFFF
14F07FFF
157FFFFF
1587FFFF
158FFFFF
15DFFFFF
15E07FFF
15EFFFFF
15F07FFF
167FFFFF
1687FFFF
168FFFFF
16DFFFFF
16E07FFF
16EFFFFF
16F07FFF
177FFFFF
1787FFFF
178FFFFF
17DFFFFF
17E07FFF
17EFFFFF
17F07FFF
1FFFFFFF
200FFFFF
20AFFFFF
20B1FFFF
20BEFFFF
20BF01FF
20BFFFFF
20C000FF
20FFFFFF
0 13800000
0 13880000
0 13900000
0 13E00000
0 13E08000
0 13F00000
0 13F08000
0 14800000
0 14880000
0 14900000
0 14E00000
0 14E08000
0 14F00000
0 14F08000
0 15800000
0 15880000
0 15900000
0 15E00000
0 15E08000
0 15F00000
0 15F08000
0 16800000
0 16880000
0 16900000
0 16E00000
0 16E08000
0 16F00000
0 16F08000
0 17800000
0 17880000
0 17900000
0 17E00000
0 17E08000
0 17F00000
0 17F08000
0 20000000
0 20100000
0 20B00000
0 20B20000
0 20BF0000
0 20BF0200
0 20C00000
0 20C00100
0 1387FFFF
0 138FFFFF
0 13DFFFFF
0 13E07FFF
0 13EFFFFF
0 13F07FFF
0 147FFFFF
0 1487FFFF
0 148FFFFF
0 14DFFFFF
0 14E07FFF
0 14EFFFFF
0 14F07FFF
0 157FFFFF
0 1587FFFF
0 158FFFFF
0 15DFFFFF
0 15E07FFF
0 15EFFFFF
0 15F07FFF
0 167FFFFF
0 1687FFFF
0 168FFFFF
0 16DFFFFF
0 16E07FFF
0 16EFFFFF
0 16F07FFF
0 177FFFFF
0 1787FFFF
0 178FFFFF
0 17DFFFFF
0 17E07FFF
0 17EFFFFF
0 17F07FFF
0 1FFFFFFF
0 200FFFFF
0 20AFFFFF
0 20B1FFFF
0 20BEFFFF
0 20BF01FF
0 20BFFFFF
0 20C000FF
0 20FFFFFF
Reserved
32K
CorePac3 L1P SRAM
Reserved
1M-32K
32K
CorePac3 L1D SRAM
Reserved
9M-32K
512K
512K
5M
CorePac4 L2 SRAM
Reserved
Reserved
32K
CorePac4 L1P SRAM
Reserved
1M-32K
32K
CorePac4 L1D SRAM
Reserved
9M-32K
512K
512K
5M
CorePac5 L2 SRAM
Reserved
Reserved
32K
CorePac5 L1P SRAM
Reserved
1M-32K
32K
CorePac5 L1D SRAM
Reserved
9M-32K
512K
512K
5M
CorePac6 L2 SRAM
Reserved
Reserved
32K
CorePac6 L1P SRAM
Reserved
1M-32K
32K
CorePac6 L1D SRAM
Reserved
9M-32K
512K
512K
5M
CorePac7 L2 SRAM
Reserved
Reserved
32K
CorePac7 L1P SRAM
Reserved
1M-32K
32K
CorePac7 L2 SRAM
Reserved
129M-32K
1M
System trace manager (STM) configuration
Reserved
10M
128K
832K
512
Boot ROM
Reserved
SPI
64K-512
256
Reserved
EMIF16 config
Reserved
12M - 256
26
Device Overview
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