TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
www.ti.com
Figure 7-41
HyperLink Station Management Clock Timing
1
2
3
Figure 7-42
HyperLink Station Management Transmit Timing
4
5
4
5
MCMTX<xx>CLK
MCMTX<xx>DAT
<xx> represents the interface that is being used: PM or FL
Figure 7-43
HyperLink Station Management Receive Timing
6
7
6
7
MCMRX<xx>CLK
MCMRX<xx>DAT
<xx> represents the interface that is being used: PM or FL
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Peripheral Information and Electrical Specifications 215