TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
www.ti.com
Table 7-55
MPU1 Registers (Part 2 of 2)
Offset
238h
240h
244h
248h
300h
304h
308h
Name
Description
PROG3_MPPA
PROG4_MPSAR
PROG4_MPEAR
PROG4_MPPA
FLTADDRR
FLTSTAT
Programmable range 3, memory page protection attributes
Programmable range 4, start address
Programmable range 4, end address
Programmable range 4, memory page protection attributes
Fault address
Fault status
FLTCLR
Fault clear
End of Table 7-55
Table 7-56
MPU2 Registers (Part 1 of 2)
Offset
0h
Name
Description
REVID
Revision ID
4h
CONFIG
Configuration
10h
IRAWSTAT
Interrupt raw status/set
14h
IENSTAT
Interrupt enable status/clear
18h
IENSET
Interrupt enable
1Ch
IENCLR
Interrupt enable clear
20h
EOI
End of interrupt
200h
204h
208h
210h
214h
218h
220h
224h
228h
230h
234h
238h
240h
244h
248h
250h
254h
258h
260h
264h
268h
270h
274h
278h
280h
PROG0_MPSAR
PROG0_MPEAR
PROG0_MPPA
PROG1_MPSAR
PROG1_MPEAR
PROG1_MPPA
PROG2_MPSAR
PROG2_MPEAR
PROG2_MPPA
PROG3_MPSAR
PROG3_MPEAR
PROG3_MPPA
PROG4_MPSAR
PROG4_MPEAR
PROG4_MPPA
PROG5_MPSAR
PROG5_MPEAR
PROG5_MPPA
PROG6_MPSAR
PROG6_MPEAR
PROG6_MPPA
PROG7_MPSAR
PROG7_MPEAR
PROG7_MPPA
PROG8_MPSAR
Programmable range 0, start address
Programmable range 0, end address
Programmable range 0, memory page protection attributes
Programmable range 1, start address
Programmable range 1, end address
Programmable range 1, memory page protection attributes
Programmable range 2, start address
Programmable range 2, end address
Programmable range 2, memory page protection attributes
Programmable range 3, start address
Programmable range 3, end address
Programmable range 3, memory page protection attributes
Programmable range 4, start address
Programmable range 4, end address
Programmable range 4, memory page protection attributes
Programmable range 5, start address
Programmable range 5, end address
Programmable range 5, memory page protection attributes
Programmable range 6, start address
Programmable range 6, end address
Programmable range 6, memory page protection attributes
Programmable range 7, start address
Programmable range 7, end address
Programmable range 7, memory page protection attributes
Programmable range 8, start address
Copyright 2013 Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 195
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