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TMS320C6416TZLZ7 参数 Datasheet PDF下载

TMS320C6416TZLZ7图片预览
型号: TMS320C6416TZLZ7
PDF下载: 下载PDF文件 查看货源
内容描述: 定点数字信号处理器 [FIXED-POINT DIGITAL SIGNAL PROCESSORS]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器时钟
文件页数/大小: 140 页 / 2016 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SPRS226H − NOVEMBER 2003 − REVISED AUGUST 2005  
Terminal Functions (Continued)  
SIGNAL  
NAME  
IPD/  
IPU  
TYPE  
DESCRIPTION  
NO.  
||  
EMIFB (16-bit) − DATA  
BED15  
D7  
B6  
BED14  
BED13  
BED12  
BED11  
BED10  
BED9  
BED8  
BED7  
BED6  
BED5  
BED4  
BED3  
BED2  
BED1  
BED0  
C7  
A6  
D8  
B7  
C8  
A7  
I/O/Z  
IPU  
EMIFB external data  
C9  
B8  
D9  
B9  
C10  
A9  
D10  
B10  
MULTICHANNEL BUFFERED SERIAL PORT 2 (McBSP2)  
McBSP2 enable pin. This pin works in conjunction with the PCI_EN pin to enable/disable other  
peripherals (for more details, see the Device Configurations section of this data sheet).  
MCBSP2_EN  
AF3  
AE4  
AB1  
AC2  
AB3  
AA2  
AC1  
AB2  
I
IPD  
McBSP2 external clock source (CLKS2) [input only] [default] or this pin can also be  
programmed as a GPIO 8 pin (I/O/Z).  
§
CLKS2/GP8  
I/O/Z  
I/O/Z  
I/O/Z  
I
IPD  
McBSP2 receive clock. When McBSP2 is disabled (PCI_EN pin = 1 and MCBSP2_EN  
pin = 0), this pin is tied-off.  
CLKR2  
CLKX2/  
IPD  
IPD  
IPU  
IPU  
IPD  
IPD  
McBSP2 transmit clock (I/O/Z) [default] or PCI serial interface clock (O).  
§
XSP_CLK  
McBSP2 receive data (I) [default] or PCI serial interface data in (I). In PCI mode, this pin is  
connected to the output data pin of the serial PROM.  
§
DR2/XSP_DI  
McBSP2 transmit data (O/Z) [default] or PCI serial interface data out (O). In PCI mode, this pin  
is connected to the input data pin of the serial PROM.  
§
DX2/XSP_DO  
O/Z  
I/O/Z  
I/O/Z  
McBSP2 receive frame sync. When McBSP2 is disabled (PCI_EN pin = 1 and MCBSP2_EN  
pin = 0), this pin is tied-off.  
FSR2  
McBSP2 transmit frame sync. When McBSP2 is disabled (PCI_EN pin = 1 and MCBSP2_EN  
pin = 0), this pin is tied-off.  
FSX2  
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground  
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kIPD or IPU resistor. To pull up a signal to the opposite  
supply rail, a 1-kresistor should be used.)  
For the C6415T and C6416T devices, these pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet.  
The C6414T device does not support the PCI or UTOPIA peripherals; therefore, these muxed peripheral pins except CLKS2/GP8 are standalone  
peripheral functions for this device.  
These C64xdevices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is an EMIFA signal  
whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of  
discussion, the prefix “A” or “B” may be omitted from the signal name.  
§
||  
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51  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
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