ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢈ ꢀꢊ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉꢋ ꢀꢊ ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢇꢀ
ꢌ ꢍꢎ ꢏꢐꢑꢒꢓ ꢍ ꢔꢀ ꢐꢍ ꢕꢍ ꢀꢖꢗ ꢂꢍ ꢕ ꢔꢖꢗ ꢒꢘ ꢓ ꢆꢏ ꢂ ꢂꢓ ꢘ ꢂ
SPRS226H − NOVEMBER 2003 − REVISED AUGUST 2005
signal groups description (continued)
64
Data
AED[63:0]
AECLKIN
AECLKOUT1
ACE3
ACE2
AECLKOUT2
ASDCKE
Memory Map
Space Select
External
Memory I/F
Control
AARE/ASDCAS/ASADS/ASRE
ACE1
ACE0
AAOE/ASDRAS/ASOE
AAWE/ASDWE/ASWE
AARDY
20
Address
AEA[22:3]
ASOE3
ABE7
ABE6
ABE5
ABE4
ABE3
ABE2
ABE1
ABE0
APDT
Byte Enables
AHOLD
Bus
Arbitration
AHOLDA
ABUSREQ
†
EMIFA (64-bit)
16
Data
BED[15:0]
BECLKIN
BECLKOUT1
BECLKOUT2
BCE3
BCE2
BCE1
BCE0
External
Memory I/F
Control
BARE/BSDCAS/BSADS/BSRE
BAOE/BSDRAS/BSOE
BAWE/BSDWE/BSWE
BARDY
Memory Map
Space Select
20
BSOE3
BPDT
BEA[20:1]
Address
BBE1
BBE0
Byte Enables
EMIFB (16-bit)
BHOLD
Bus
Arbitration
BHOLDA
BBUSREQ
†
†
These C64x devices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is
an EMIFA signal whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document,
in generic EMIF areas of discussion, the prefix “A” or “B” may be omitted from the signal name.
Figure 4. Peripheral Signals
33
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