LRCIN/
LRCOUT
1/fs
BCLK
Left Channel
DIN/
DOUT
MSB
LSB
n
n−1
1
0
n
n−1
Right Channel
1
0
n
Figure 3−6. Left-Justified Mode Timing
3.3.1.3 I
2
S Mode
In I
2
S mode, the MSB is available on the second rising edge of BCLK, after the falling edge on LRCIN or LRCOUT
(see Figure 3-7).
1/fs
LRCIN/
LRCOUT
BCLK
1BCLK
Left Channel
n
MSB
n−1
1
0
LSB
n
n−1
Right Channel
1
0
DIN/
DOUT
Figure 3−7. I
2
S Mode Timing
3.3.1.4 DSP Mode
The DSP mode is compatible with the McBSP ports of TI DSPs. LRCIN and LRCOUT must be connected to the Frame
Sync signal of the McBSP. A falling edge on LRCIN or LRCOUT starts the data transfer. The left-channel data consists
of the first data word, which is immediately followed by the right channel data word (see Figure 3-8). Input word length
is defined by the IWL register. Figure 3−8 shows LRP = 1 (default LRP = 0).
LRCIN/
LRCOUT
BCLK
Left Channel
Right Channel
0
n
n−1
1
0
LSB
DIN/
DOUT
n
MSB
n−1
1
LSB MSB
Figure 3−8. DSP Mode Timing
3−8
TI [ TEXAS INSTRUMENTS ]
