INSEL
MICM
MICB
Input select for ADC
Microphone mute
Microphone boost
0 = Line
0 = Normal
0=dB
1 = Microphone
1 = Muted
1 = 20dB
X
Reserved
Digital Audio Path Control (Address: 0000101)
BIT
D8
X
D7
X
D6
X
D5
X
D4
X
D3
DACM
1
D2
DEEMP1
0
D1
DEEMP0
0
D0
ADCHP
0
Function
Default
0
0
0
0
0
DACM
DAC soft mute
0 = Disabled
1 = Enabled
DEEMP[1:0]
ADCHP
X
De-emphasis control
ADC high-pass filter
Reserved
00 = Disabled 01 = 32 kHz
10 = 44.1 kHz 11 = 48 kHz
1 = Disabled
0 = Enabled
Power Down Control (Address: 0000110)
BIT
D8
X
D7
OFF
0
D6
CLK
0
D5
OSC
0
D4
OUT
0
D3
DAC
0
D2
ADC
1
D1
MIC
1
D0
LINE
1
Function
Default
0
OFF
Device power
Clock
Oscillator
Outputs
DAC
ADC
Microphone input
Line input
Reserved
0 = On
0 = On
0 = On
0 = On
0 = On
0 = On
0 = On
0 = On
1 = Off
1 = Off
1 = Off
1 = Off
1 = Off
1 = Off
1 = Off
1 = Off
CLK
OSC
OUT
DAC
ADC
MIC
LINE
X
Digital Audio Interface Format (Address: 0000111)
BIT
D8
X
D7
X
D6
MS
0
D5
D4
LRP
0
D3
IWL1
0
D2
IWL0
0
D1
FOR1
0
D0
FOR0
1
Function
Default
LRSWAP
0
0
0
MS
LRSWAP
LRP
Master/slave mode
DAC left/right swap
DAC left/right phase
0 = Slave
0 = Disabled
0 = Right channel on, LRCIN high
1 = Right channel on, LRCIN low
DSP mode
1 = Master
1 = Enabled
1 = MSB is available on 2nd BCLK rising edge after LRCIN rising edge
0 = MSB is available on 1st BCLK rising edge after LRCIN rising edge
IWL[1:0]
FOR[1:0]
Input bit length
Data format
00 = 16 bit
01 = 20 bit
10 = 24 bit
11 = 32 bit
11 = DSP format, frame sync followed by two data words
2
10 = I S format, MSB first, left – 1 aligned
01 = MSB first, left aligned
00 = MSB first, right aligned
X
Reserved
NOTES: 1. In Master mode, the TLV320AIC23B supplies the BCLK, LRCOUT, and LRCIN. In Slave mode, BCLK, LRCOUT, and LRCIN are
supplied to the TLV320AIC23B.
2. In normal mode, BCLK = MCLK/4 for all sample rates except for 88.2 kHz and 96 kHz. For 88.2 kHz and 96 kHz sample rate,
BCLK = MCLK.
3. In USB mode, bit BCLK = MCLK
3−4
TI [ TEXAS INSTRUMENTS ]
