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TL16C552AFN 参数 Datasheet PDF下载

TL16C552AFN图片预览
型号: TL16C552AFN
PDF下载: 下载PDF文件 查看货源
内容描述: 双异步通信与FIFO元 [DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO]
分类和应用: 先进先出芯片通信
文件页数/大小: 39 页 / 544 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
transmitter switching characteristics over recommended ranges of operating free-air temperature
and supply voltage (see Note 11 and Figures 6, 7, and 8)
PARAMETER
td5
td6
td7
td8
tpd2
tpd4
tpd5
Delay time, interrupt THRE
to SOUT
at start
Delay time, SOUT
at start to interrupt THRE
Delay time, IOW (WR THR)
to interrupt THRE
Delay time, SOUT
at start to TXRDY
Propagation delay time from IOW (WR THR)
to interrupt THRE
Propagation delay time from IOR (RD IIR)
to interrupt THRE
Propagation delay time from IOW (WR THR)
to TXRDY
TEST CONDITIONS
See Figure 6
See Note 12 and Figure 6
See Note 12 and Figure 6
CL = 100 pF,
See Figures 7 and 8
CL = 100 pF,
See Figure 6
CL = 100 pF,
See Figure 6
CL = 100 pF,
See Figures 7 and 8
MIN
8
8
16
MAX
24
9
32
8
140
140
195
UNIT
RCLK
cycles
RCLK
cycles
RCLK
cycles
RCLK
cycles
ns
ns
ns
NOTES: 11. These parameters are not production tested.
12. When the transmitter interrupt delay is active, this delay is lengthened by one character time minus the last stop bit time.
receiver switching characteristics over recommended ranges of operating free-air temperature
and supply voltage (see Note 13 and Figures 9 through 13)
PARAMETER
td9
tpd6
tpd7
tpd8
Delay time from stop to INT
Propagation delay time from RCLK
to sample CLK
Propagation delay time from IOR (RD RBR/RD LSR)
to reset interrupt
Propagation delay time from IOR (RD RBR)
to RXRDY
CL = 100 pF
TEST CONDITIONS
See Note 14
MIN
MAX
1
100
150
150
UNIT
RCLK
cycle
ns
ns
ns
NOTES: 13. These parameters are not production tested.
14. The receiver data available indicator, the overrun error indicator, the trigger level interrupts, and the active RXRDY indicator are
delayed three RCLK cycles in FIFO mode (FCR0 = 1). After the first byte has been received, status indicators (PE, FE, BI) are
delayed three RCLK cycles. These indicators are updated immediately for any further bytes received after RDRBR goes active.
There are eight RCLK cycle delays for trigger change level interrupts.
modem control switching characteristics over recommended ranges of operating free-air
temperature and supply voltage, C
L
= 100 pF (see Note 15 and Figure 14)
PARAMETER
tpd9
tpd10
tpd11
tpd12
Propagation delay time from IOW (WR MCR)
to RTS (DTR)
↓↑
Propagation delay time from modem input (CTS, DSR)
↓↑
to interrupt
Propagation delay time from IOR (RD MSR)
to interrupt
Propagation delay time from RI
to interrupt
MIN
MAX
100
170
140
170
UNIT
ns
ns
ns
ns
NOTE 15: These parameters are not production tested.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
9