欢迎访问ic37.com |
会员登录 免费注册
发布采购

TL16C552AFNR 参数 Datasheet PDF下载

TL16C552AFNR图片预览
型号: TL16C552AFNR
PDF下载: 下载PDF文件 查看货源
内容描述: 双异步通信部件 [DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输PC时钟
文件页数/大小: 38 页 / 473 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TL16C552AFNR的Datasheet PDF文件第3页浏览型号TL16C552AFNR的Datasheet PDF文件第4页浏览型号TL16C552AFNR的Datasheet PDF文件第5页浏览型号TL16C552AFNR的Datasheet PDF文件第6页浏览型号TL16C552AFNR的Datasheet PDF文件第8页浏览型号TL16C552AFNR的Datasheet PDF文件第9页浏览型号TL16C552AFNR的Datasheet PDF文件第10页浏览型号TL16C552AFNR的Datasheet PDF文件第11页  
TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
recommended operating conditions
MIN
Supply voltage, VDD
Clock high-level input voltage, VIH(CLK)
Clock low-level input voltage, VIL(CLK)
High-level input voltage, VIH
Low-level input voltage, VIL
Clock frequency, fclock
Operating free-air temperature, TA
free air temperature
I suffix
M suffix
– 40
– 55
4.75
2
0
2
0
NOM
5
MAX
5.25
VDD
0.8
VDD
0.8
16
85
125
UNIT
V
V
V
V
V
MHz
°C
package thermal characteristics
PARAMETER
R
θJA
R
θJC
TJ
Junction-to-ambient thermal impedance
Junction-to-case thermal impedance
Junction temperature
TEST CONDITIONS
Board mounted, no air flow
FN Package
MIN
TYP
52
14
115
MAX
HV Package
MIN
TYP
74
3
150
MAX
UNIT
°C/W
°C/W
°C/W
electrical characteristics over recommended ranges of operating free-air temperature and supply
voltage (unless otherwise noted)
PARAMETER
VOH
VOL
High-level output voltage
TEST CONDITIONS
IOH = – 12 mA for PD0 – PD7,
IOH = – 4 mA for all other outputs (see Note 2),
IOL = 12 mA for PD0 – PD7,
IOL = 12 mA for INIT, AFD, STB, and SLIN,
IOL = 4 mA for all other outputs
VDD = 5.25 V (see Note 3),
All other terminals are floating
VI = 0 to 5.25 V
VDD = 5 25 V
5.25 V,
VO = 0 with chip deselected or
chi
VO = 5 25 V with chip and write mode selected (see Note 2)
5.25
VDD = 5.25 V
5 25 V,
In uts at 0 8 V or 2 V
V,
Inputs 0.8
No loads on outputs,
outputs
fclock = 8 MHz
MIN
2.4
MAX
UNIT
V
Low-level output voltage
0.4
±
10
±
10
±
20
50
V
µA
µA
µA
mA
II
II(CLK)
IOZ
IDD
Input current
Clock input current
High-impedance output current
High im edance out ut
Supply current
NOTES: 2. Excluding INIT, AFD, STB, and SLIN. They are open-drain terminals with an internal pullup resistor to VDD of approximately 10 KΩ.
3. Excluding the TRI input terminal. It contains an internal pulldown resistor of approximately 5 kΩ.
clock timing requirements over recommended ranges of operating free-air temperature and supply
voltage
MIN
tw1
tw2
tw3
Pulse duration, CLK
(external clock) (see Figure 1)
Pulse duration, CLK
(external clock) (see Figure 1)
Pulse duration, RESET
31
31
1000
MAX
UNIT
ns
ns
ns
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
7