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TL16C552AFNR 参数 Datasheet PDF下载

TL16C552AFNR图片预览
型号: TL16C552AFNR
PDF下载: 下载PDF文件 查看货源
内容描述: 双异步通信部件 [DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输PC时钟
文件页数/大小: 38 页 / 473 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TL16C552A, TL16C552AM  
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT  
WITH FIFO  
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999  
recommended operating conditions  
MIN NOM  
MAX  
UNIT  
V
Supply voltage, V  
DD  
4.75  
5
5.25  
Clock high-level input voltage, V  
2
0
2
0
V
V
IH(CLK)  
DD  
0.8  
Clock low-level input voltage, V  
High-level input voltage, V  
V
IL(CLK)  
V
DD  
0.8  
V
IH  
Low-level input voltage, V  
V
IL  
Clock frequency, f  
clock  
16  
85  
MHz  
I suffix  
40  
55  
Operating free-air temperature, T  
°C  
A
M suffix  
125  
package thermal characteristics  
FN Package  
HV Package  
PARAMETER  
TEST CONDITIONS  
Board mounted, no air flow  
UNIT  
MIN  
TYP  
52  
MAX  
MIN  
TYP  
74  
3
MAX  
R
R
Junction-to-ambient thermal impedance  
Junction-to-case thermal impedance  
Junction temperature  
°C/W  
°C/W  
°C/W  
θJA  
θJC  
J
14  
T
115  
150  
electrical characteristics over recommended ranges of operating free-air temperature and supply  
voltage (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
MAX  
UNIT  
I
I
= 12 mA for PD0PD7,  
= 4 mA for all other outputs (see Note 2),  
OH  
OH  
V
V
High-level output voltage  
2.4  
V
OH  
I
I
I
= 12 mA for PD0PD7,  
= 12 mA for INIT, AFD, STB, and SLIN,  
= 4 mA for all other outputs  
OL  
OL  
OL  
Low-level output voltage  
0.4  
V
OL  
V
= 5.25 V (see Note 3),  
DD  
All other terminals are floating  
I
I
Input current  
±10  
±10  
µA  
µA  
I
Clock input current  
V = 0 to 5.25 V  
I
I(CLK)  
OZ  
V
V
= 5.25 V,  
V
= 0 with chip deselected or  
DD  
O
O
I
I
High-impedance output current  
Supply current  
±20  
µA  
= 5.25 V with chip and write mode selected (see Note 2)  
V
DD  
= 5.25 V,  
No loads on outputs,  
f = 8 MHz  
clock  
50  
mA  
DD  
Inputs at 0.8 V or 2 V,  
NOTES: 2. Excluding INIT, AFD, STB, and SLIN. They are open-drain terminals with an internal pullup resistor to V  
of approximately 10 KΩ.  
DD  
3. Excluding the TRI input terminal. It contains an internal pulldown resistor of approximately 5 k.  
clocktimingrequirementsoverrecommendedrangesofoperatingfree-airtemperatureandsupply  
voltage  
MIN  
31  
MAX  
UNIT  
ns  
t
t
t
Pulse duration, CLK (external clock) (see Figure 1)  
Pulse duration, CLK (external clock) (see Figure 1)  
Pulse duration, RESET  
w1  
w2  
w3  
31  
ns  
1000  
ns  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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