TAS5715
www.ti.com
SLOS645 –AUGUST 2010
VOLUME CONFIGURATION REGISTER (0x0E)
Bits
Volume slew rate (Used to control volume change and MUTE ramp rates). These bits control the
D2–D0: number of steps in a volume ramp. Volume steps occur at a rate that depends on the sample rate of
the I2S data as follows:
Sample rate (KHz)
8/16/32
Approximate ramp rate
125 ms/step
11.025/22.05/44.1
12/24/48
90.7 ms/step
83.3 ms/step
Table 13. Volume Control Register (0x0E)
D7 D6 D5 D4 D3
D2
–
D1
–
D0
–
FUNCTION
(1)
1
–
–
–
–
–
0
–
–
–
–
–
0
–
–
–
–
–
1
–
–
–
–
–
0
–
–
–
–
–
Reserved
0
0
0
Volume slew 512 steps (43 ms volume ramp time at 48 kHz)(1)
Volume slew 1024 steps (85 ms volume ramp time at 48 kHz)
Volume slew 2048 steps (171 ms volume ramp time at 48 kHz)
Volume slew 256 steps (21 ms volume ramp time at 48 kHz)
Reserved
0
0
1
0
1
0
0
1
1
1
X
X
(1) Default values are in bold.
DC DETECT CONTROL REGISTER (0x0F)
Table 14. DC Detect Control Register (0x0F)(1)
D7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D6
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D5
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
D2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
D1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
D0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Magnitude
7
MAX +
52.73%
55.86%
58.98%
62.11%
65.23%
68.36%
71.48%
74.61%
77.73%
80.86%
83.98%
87.11%
90.23%
93.36%
96.48%
99.61%
MAX –
47.27%
44.14%
41.02%
37.89%
34.77%
31.64%
28.52%
25.39%
22.27%
19.14%
16.02%
12.89%
9.77%
15
23
31
39
47
55
63
71
79
87
95
103
111
119
127
6.64%
3.52%
0.39%
Time, ms
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
157.1
314.2
471.3
628.4
785.5
942.6
1099.7
(1) See register 0x46, bit D10 for enable/disable control of this feature.
Copyright © 2010, Texas Instruments Incorporated
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