TAS5715
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SLOS645 –AUGUST 2010
START/STOP PERIOD REGISTER (0x1A)
This register is used to control the soft-start and soft-stop period following an enter/exit all-channel shutdown
command or change in the PDN state. This helps reduce pops and clicks at start-up and shutdown.The times are
only approximate and vary depending on device activity level and I2S clock stability.
Table 18. Start/Stop Period Register (0x1A)
D7 D6 D5 D4 D3
D2
–
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
–
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
–
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FUNCTION
(1)
0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
–
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
PWM headphone start/stop time = 94.2 ms
No 50% duty cycle start/stop period
16.5-ms 50% duty cycle start/stop period(1)
23.9-ms 50% duty cycle start/stop period
31.4-ms 50% duty cycle start/stop period
40.4-ms 50% duty cycle start/stop period
53.9-ms 50% duty cycle start/stop period
70.3-ms 50% duty cycle start/stop period
94.2-ms 50% duty cycle start/stop period
125.7-ms 50% duty cycle start/stop period
164.6-ms 50% duty cycle start/stop period
239.4-ms 50% duty cycle start/stop period
314.2-ms 50% duty cycle start/stop period
403.9-ms 50% duty cycle start/stop period
538.6-ms 50% duty cycle start/stop period
703.1-ms 50% duty cycle start/stop period
942.5-ms 50% duty cycle start/stop period
1256.6-ms 50% duty cycle start/stop period
1728.1-ms 50% duty cycle start/stop period
2513.6-ms 50% duty cycle start/stop period
3299.1-ms 50% duty cycle start/stop period
4241.7-ms 50% duty cycle start/stop period
5655.6-ms 50% duty cycle start/stop period
7383.7-ms 50% duty cycle start/stop period
9897.3-ms 50% duty cycle start/stop period
13,196.4-ms 50% duty cycle start/stop period
(1) Default values are in bold.
Copyright © 2010, Texas Instruments Incorporated
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