TAS5705
SLOS549–JUNE 2008...................................................................................................................................................................................................... www.ti.com
ERROR STATUS REGISTER (0x02)
Note that the error bits are sticky bits that are not cleared by the hardware. This means that the software must
clear the register (write zeroes) and then read them to determine if there are any persistent errors.
Table 10. Error Status Register (0x02)
D7
–
D6
1
D5
–
D4
–
D3
–
D2
–
D1
–
D0
–
FUNCTION
PLL autolock error
SCLK error
–
–
1
–
–
–
–
–
–
–
–
1
–
–
–
–
LRCLK error
Frame slip
–
–
–
–
1
–
–
–
(1)
0
0
0
0
0
0
0
0
No errors
(1) Default values are in bold.
SYSTEM CONTROL REGISTER 1 (0x03)
System control register 1 has several functions:
Bit D7:
Bit D5:
Bit D3:
Bit D2:
If 0, the dc-blocking filter for each channel is disabled.
If 1, the dc-blocking filter (–3 dB cutoff <1 Hz) for each channel is enabled (default).
If 0, use soft unmute on recovery from clock error. This is a slow recovery.
If 1, use hard unmute on recovery from clock error (default). This is a fast recovery.
If 0, clock autodetect is enabled (default).
If 1, clock autodetect is disabled.
If 0, soft start is enabled (default).
If 1, soft start is disabled.
Bits D1–D0: Select de-emphasis
Table 11. System Control Register 1 (0x03)
D7
0
1
–
–
–
–
–
–
–
–
–
–
–
–
D6
–
–
0
–
–
–
–
–
–
–
–
–
–
–
D5
–
–
–
0
1
–
–
–
–
–
–
–
–
–
D4
–
–
–
–
–
0
–
–
–
–
–
–
–
–
D3
–
–
–
–
–
–
0
1
–
–
–
–
–
–
D2
–
–
–
–
–
–
–
–
0
1
–
–
–
–
D1
–
–
–
–
–
–
–
–
–
–
0
0
1
1
D0
–
–
–
–
–
–
–
–
–
–
0
1
0
1
FUNCTION
PWM high-pass (dc blocking) disabled
(1)
PWM high-pass (dc blocking) enabled
(1)
Reserved
Soft unmute on recovery from clock error
(1)
Hard unmute on recovery from clock error
(1)
Reserved
(1)
Enable clock autodetect
Disable clock autodetect
(1)
Enable soft start
Disable soft start
(1)
No de-emphasis
Reserved
De-emphasis for fS = 44.1 kHz
De-emphasis for fS = 48 kHz
(1) Default values are in bold.
50
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