1G80
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
Logic Diagram
2
C
CLK
C
C
4
TG
Q
C
C
C
C
1
D
TG
TG
TG
C
C
C
FUNCTION TABLE
INPUTS
OUTPUT
CLK
D
H
L
Q
L
H
↑
↑
L
X
Q
0
ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS
LVC
5V
LVC
3.3V
LVC
2.5V
LVC
1.8V
AUC AUC AUP
AUP
2.5V
AUP
1.8V
AUP
1.1V
PARAMETER
MAX or MIN
UNIT
2.5V
1.8V
3.3V
ICC
IOH
IOL
MAX
MAX
MAX
0.01
-32
32
0.01
-24
24
0.01
-8
8
0.01
-4
4
0.01
-9
9
0.01 0.0009 0.0009 0.0009 0.0009 mA
-8
8
-4
4
-3.1
3.1
-1.9
1.9
-1.1
1.1
mA
mA
TIMING REQUREMENTS AND SWITCHING CHARACTERISTICS
LVC
5V
LVC
3.3V
LVC
2.5V
LVC AUC AUC AUP AUP AUP AUP
1.8V 2.5V 1.8V 3.3V 2.5V 1.8V 1.1V
PARAMETER
INPUT
OUTPUT
MAX or MIN
fmax
tw
MIN
MIN
160
2.5
1.1
1.1
0.4
4.5
4.5
160
2.5
1.3
1.3
0.9
5.2
5.2
160
2.5
1.5
1.5
0.2
7
160
2.5
2.3
2.5
0
275
1.7
0.5
0.5
0.1
1.8
1.8
250
1.7
0.6
0.6
0.1
2.4
2.4
260
1.9
0.4
0.7
0
250
1.7
0.6
0.8
0
240
1.6
0.8
1.1
0
170
2.5
1.2
2
0
17.7
17.7
CLK high or low
Before CLK ↑ , Data high
Before CLK ↑ , Data low
Data after CLK ↑
tsu
MIN
th
tPLH
tPHL
MIN
9.9
9.9
4.9
4.9
6.3
6.3
7.3
7.3
CLK
Q
MAX
7
UNIT fmax : MHz other : ns
105
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters. See www.ti.com/sc/logic for the most current data sheets.
TI [ TEXAS INSTRUMENTS ]
