SN65MLVD2
SN65MLVD3
www.ti.com
SLLS767–NOVEMBER 2006
B
A
R
L
1.2 V
499 W
C
L
Inputs
V
O
15 pF
RE
V
TEST
V
TEST
V
CC
0.8 V
A
V
V
CC
RE
CC
2
0 V
t
t
PLZ
PZL
V
CC
CC
2
V
V
O
V
+ 0.5 V
OL
V
OL
V
TEST
A
0 V
1.6 V
V
V
CC
CC
2
RE
0 V
t
PHZ
t
PZH
V
OH
0.5 V
V
OH
CC
2
V
V
O
0 V
A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, frequency = 1 MHz,
duty cycle = 50 ± 5%.
B. RL is 1% tolerance, metal film, surface mount, and located within 2 cm of the D.U.T
C. CL is the instrumentation and fixture capacitance within 2 cm of the D.U.T. and ±20%. The measurement is made on
test equipment with a –3dB bandwidth of at least 1GHz.
Figure 3. Receiver Enable/Disable Time Test Circuit and Waveforms
9
Submit Documentation Feedback
TI [ TEXAS INSTRUMENTS ]
