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SN65MLVD2DRBTG4 参数 Datasheet PDF下载

SN65MLVD2DRBTG4图片预览
型号: SN65MLVD2DRBTG4
PDF下载: 下载PDF文件 查看货源
内容描述: 单M- LVDS接收器 [SINGLE M-LVDS RECEIVERS]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
文件页数/大小: 17 页 / 341 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN65MLVD2  
SN65MLVD3  
www.ti.com  
SLLS767NOVEMBER 2006  
RECEIVER SWITCHING CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP(1)  
MAX UNIT  
tPLH  
tPHL  
tr  
Propagation delay time, low-to-high-level output  
Propagation delay time, high-to-low-level output  
Output signal rise time  
2
2
1
1
6
6
ns  
ns  
2.3  
2.3  
210  
250  
1
tf  
Output signal fall time  
CL = 15 pF, See Figure 2  
ns  
ps  
Type 1  
Type 2  
90  
45  
tsk(p)  
Pulse skew (|tPHL– tPLH|)  
tsk(pp)  
tjit(per)  
tjit(c-c)  
Part-to-part skew  
ns  
ps  
ps  
ps  
ps  
ps  
ps  
ns  
ns  
ns  
ns  
Period jitter, rms (1 standard deviation)(2)  
Cycle-to-cycle jitter, rms(3)  
125 MHz clock input  
125 MHz clock input(4)  
10  
8
Type 1  
Type 2  
Type 1  
Type 2  
500  
450  
8
tjit(det)  
Deterministic jitter(2)  
Random jitter(2)  
250 Mbps 215-1 PRBS input(5)  
250 Mbps 215-1 PRBS input(5)  
tjit(ran)  
8
tPZH  
tPZL  
tPHZ  
tPLZ  
Enable time, high-impedance-to-high-level output  
Enable time, high-impedance-to-low-level output  
Disable time, high-level-to-high-impedance output  
Disable time, low-level-to-high-impedance output  
CL = 15 pF, See Figure 3  
CL = 15 pF, See Figure 3  
CL = 15 pF, See Figure 3  
CL = 15 pF, See Figure 3  
15  
15  
10  
10  
(1) All typical values are at 25°C and with a 3.3-V supply voltage.  
(2) Jitter measured by triggering off of the input source to track out the associated input jitter.  
(3) Stimulus jitter has been subtracted from the numbers.  
(4) Measured over 75K samples  
(5) Measured over BER = 10–6  
.
TERMINAL FUNCTIONS  
TERMINAL  
I/O  
DESCRIPTION  
NAME  
A
NO.  
6
I
I
M-LVDS Non-inverting input  
M-LVDS Inverting input  
B
7
R
3
O
I
Data output from receivers  
Receiver enable, active low, enables all receivers  
Circuit ground  
RE  
GND  
VCC  
2
4, 5  
1, 8  
Supply voltage  
DEVICE FUNCTION TABLES  
TYPE-1 RECEIVER (SN65MLVD2)  
INPUTS(1)  
TYPE-2 RECEIVER (SN65MLVD3)  
INPUTS(1)  
OUTPUT(1)  
OUTPUT(1)  
VID = VA– VB  
ID 35 mV  
–35 mV VID 35 mV  
RE  
R
H
?
VID = VA– VB  
ID 135 mV  
65 mV VID 135 mV  
RE  
R
H
?
V
L
V
L
L
L
L
L
VID – 35 mV  
L
VID 65 mV  
L
X
X
H
Z
Z
?
X
X
H
Z
Z
L
Open  
L
Open  
L
Open Circuit  
Open Circuit  
(1) H=high level, L=low level, Z=high impedance, X=Don’t care, ?=indeterminate  
5
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