SN65MLVD2
SN65MLVD3
www.ti.com
SLLS767–NOVEMBER 2006
V
ID
V
A
C
L
V
O
15 pF
V
B
V
1.2 V
A
V
B
0.8 V
0.4 V
V
ID
0 V
-0.4 V
t
t
PHL
PLH
V
V
OH
O
V
90%
CC
2
10%
V
OL
t
f
t
r
A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, Frequency = 1 MHz,
duty cycle = 50 ± 5%. CL is a combination of a 20%-tolerance, low-loss ceramic, surface-mount capacitor and fixture
capacitance within 2 cm of the D.U.T.
B. The measurement is made on test equipment with a –3dB bandwidth of at least 1 GHz.
Figure 2. Receiver Timing Test Circuit and Waveforms
8
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