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SGUS014H − FEBRUARY 1991 − REVISED JUNE 2004
XF0 and XF1 timing when executing SIGI
The following table defines the timing parameters for the XF0 and XF1 pins during execution of SIGI.
timing parameters for XF0 and XF1 when executing SIGI (see Figure 16)
320C30-40
320C30-50
†
NO.
UNIT
MIN
MAX
MIN
MAX
41.1
42
t
t
t
t
Delay time, H3 high to XF0 low
Delay time, H3 high to XF0 high
Setup time, XF1 valid before H1 low
Hold time, XF1 after H1 low
13
13
12
12
ns
ns
ns
ns
d(H3H-XF0L)
d(H3H-XF0H)
su(XF1-H1L)
h(H1L-XF1)
43
9
0
9
0
44
†
Numbers in this column match those used in Figure 16.
Fetch
SIGI
Decode
Read
Execute
H3
H1
41.1
43
42
XF0
44
XF1
Figure 16. Timing for XF0 and XF1 When Executing SIGI
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