RM46L450
RM46L850
SPNS184 –SEPTEMBER 2012
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6.3 Device Identification
6.3.1 Device Identification Code Register
The device identification code register identifies several aspects of the device including the silicon version.
The details of the device identification code register are shown in Table 6-1. The device identification code
register value for this device is:
•
Rev 0 = 0x8046AD05
Figure 6-2. Device ID Bit Allocation Register
31
CP-15
R-1
30
29
13
28
27
26
25
24
23
22
21
20
19
3
18
17
16
TECH
R-0
UNIQUE ID
R-00000000100011
15
14
12
11
10
9
8
7
6
5
4
2
1
1
0
0
1
TECH
I/O
PERIPH FLASH ECC
RAM
ECC
VERSION
VOLT PARITY
AGE
R-101
R-0
R-1
R-10
R-1
R-00000
R-1
R-0
R-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 6-1. Device ID Bit Allocation Register Field Descriptions
Bit
Field
Value
Description
31
CP15
Indicates the presence of coprocessor 15
CP15 present
1
30-17
16-13
UNIQUE ID
TECH
100011 Unique device identification number
This bitfield holds a unique number for a dedicated device configuration (die).
Process technology on which the device is manufactured.
0101
F021
12
I/O VOLTAGE
I/O voltage of the device.
I/O are 3.3v
0
1
11
PERIPHERAL
PARITY
Peripheral Parity
Parity on peripheral memories
10-9
FLASH ECC
Flash ECC
10
1
Program memory with ECC
Indicates if RAM memory ECC is present.
ECC implemented
8
RAM ECC
7-3
2-0
REVISION
101
Revision of the Device.
The platform family ID is always 0b101
6.3.2 Die Identification Registers
The four die ID registers at addresses 0xFFFFE1F0, 0xFFFFE1F4, 0xFFFFE1F8 and FFFFE1FC form a
128-bit dieid with the information as shown in Table Table 6-2.
Table 6-2. Die-ID Registers
Item
X Coord. on Wafer
Y Coord. on Wafer
Wafer #
# of Bits
Bit Location
7..0
8
8
15..8
6
21..16
Lot #
24
82
45..22
Reserved
127..46
166
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