SPNS184 – SEPTEMBER 2012
2.3
Terminal Functions
and
identify the external signal names, the associated pin/ball numbers along
with the mechanical package designator, the pin/ball type (Input, Output, IO, Power or Ground), whether
the pin/ball has any internal pullup/pulldown, whether the pin/ball can be configured as a GIO, and a
functional pin/ball description. The first signal name listed is the primary function for that terminal. The
signal name in Bold is the function being described. Refer to the I/O Multiplexing Module (IOMM) User
Guide for information on how to select between different multiplexed functions.
NOTE
All I/O signals except nRST are configured as inputs while nPORRST is low and immediately
after nPORRST goes High.
All output-only signals are configured as inputs while nPORRST is low, and are configured
as outputs immediately after nPORRST goes High.
While nPORRST is low, the input buffers are disabled, and the output buffers are tri-stated.
2.3.1
2.3.1.1
PGE Package
Multi-Buffered Analog-to-Digital Converters (MibADC)
Table 2-1. PGE Multi-Buffered Analog-to-Digital Converters (MibADC1, MibADC2)
Terminal
Signal Name
144
PGE
66
67
69
68
86
55
60
71
73
74
76
78
80
61
Signal
Type
Power
Power
Power
Ground
Input
I/O
Input
Pull Down
Pull Up
-
Programmable,
20uA
Programmable,
20uA
-
ADC1 event trigger input,
or GIO
ADC2 event trigger input,
or GIO
ADC1 analog input
Default
Pull State
-
Pull Type
Description
PRODUCT PREVIEW
ADREFHI
(1)
ADREFLO
(1)
VCCAD
VSSAD
(1)
(1)
-
ADC high reference
supply
ADC low reference supply
Operating supply for ADC
AD1EVT/MII_RX_ER/RMII_RX_ER
MIBSPI3NCS[0]/AD2EVT/GIOB[2]/
EQEP1I/N2HET2_PIN_nDIS
AD1IN[0]
AD1IN[01]
AD1IN[02]
AD1IN[03]
AD1IN[04]
AD1IN[05]
AD1IN[06]
AD1IN[07]
(1)
10
The ADREFHI, ADREFLO, VCCAD and VSSAD connections are common for both ADC cores.
Device Package and Terminal Functions
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