RM46L450PGET 参数 Datasheet PDF下载

SPNS184 – SEPTEMBER 2012

Table 2-2. PGE Enhanced High-End Timer Modules (N2HET) (continued)

Terminal

Signal Name

GIOA[2]/USB2.TXDAT/USB_FUNC.TXDO/N2HET2[0]/EQE

P2I

GIOA[6]/N2HET2[4]/EPWM1B

GIOA[7]/N2HET2[6]EPWM2A

N2HET1[01]/SPI4NENA/USB2.TXEN/

USB_FUNC.PUENO//N2HET2[8]

N2HET1[03]/SPI4NCS[0]/USB2.SPEED/

USB_FUNC.PUENON/N2HET2[10]/EQEP2B

N2HET1[05]/SPI4SOMI/N2HET2[12]

N2HET1[07]/USB2.PortPower/USB_FUNC.GZO/

N2HET2[14]/EPWM7B

N2HET1[09]/N2HET2[16]/USB2.SUSPEND/

USB_FUNC.SUSPENDO

N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]/

USB2.OverCurrent/USB_FUNC.VBUSI/EPWM1SYNCO

MIBSPI3NCS[0]/AD2EVT/GIOB[2]/EQEP1I/N2HET2_PIN_n

DIS

144

PGE

9

16

22

23

24

31

33

35

6

55

Pull Up

Signal

Type

I/O

Default Pull

State

Pull Down

Pull Type

Description

Programmable,

20uA

N2HET2

time

input

capture

or

output

compare, or GIO

Each terminal has a

suppression filter that

ignores input pulses

smaller

than

a

programmable duration.

2.3.1.3

Enhanced Capture Modules (eCAP)

Table 2-3. PGE Enhanced Capture Modules (eCAP)

(1)

Terminal

Signal Name

144

PGE

41

51

52

96

97

105

Signal

Type

I/O

Default

Pull State

Pull Down

Pull Up

Pull Type

Description

NHET1[15]/MIBSPI1NCS[4]/ECAP1

MIBSPI3SOMI/AWM1_EXT_ENA/ECAP2

MIBSPI3SIMO/AWM1_EXT_SEL[0]/ECAP3

MIBSPI1NENA/N2HET1[23]/MII_RXD[2]/

USB1.VP/ECAP4

MIBSPI5NENA/MII_RXD[3]/USB1.VM/MIBSPI5SOMI[1]/ECA

P5

MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/

USB1.RCV/ECAP6

(1)

Fixed, 20uA

Enhanced Capture

Module 1 I/O

Enhanced Capture

Module 2 I/O

Enhanced Capture

Module 3 I/O

Enhanced Capture

Module 4 I/O

Enhanced Capture

Module 5 I/O

Enhanced Capture

Module 6 I/O

These signals, when used as inputs, are double-synchronized and then optionally filtered with a 6-cycle VCLK4-based counter.

Copyright © 2012, Texas Instruments Incorporated

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