ADS1259
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SBAS424C –JUNE 2009–REVISED MARCH 2010
3. Optional readback verification of the register data
READ register command: <20h>, <08>
The nine bytes of readback data that follow represent the nine register bytes.
4. Take the START pin high or send the START command to start conversions.
5. Optionally, send the RDATAC command <10h>. This permits reading of conversion data without the need of
the read data command. Otherwise, the read data opcode must be sent to read each conversion result.
6. When the DRDY pin or the DRDY bit goes low, or when DOUT transitions low, read the data.
PGA280 APPLICATION
Figure 64 shows the ADS1259 connected to the PGA280. The PGA280 is a programmable gain, fully-differential
instrumentation amplifier that is ideally suited to drive the ADS1259. The amplifier features ±5V to ±18V supply
input section that accepts wide ranging signal levels and features a +5V output section that matches the
ADS1259 low-voltage inputs. The ADS1259 +2.5V REFOUT drives the PGA280 VOCM pin to level shift the
signal.
The ADS1259 provides a clock output (SYNCOUT) that drives the PGA280 (GPIO6) chopping clock input. An
optional extended CS (ECS) function feature of the PGA280 (GPIO0) allows use of one CS to alternately select
each device for SPI communication. Additionally, the optional BUFA trigger output of the PGA280 (GPIO5) starts
the ADS1259 conversions. The trigger can be delayed to occur after an input multiplexer change. The delay
allows settling of the PGA280 before the ADC conversion begins.
+5V
+15V(1) -15V(1)
1mF
+
4(1)
VSOP
20
17
VREFP VREFN
RESET/PWDN
18
1mF
6
11
VSN
VSP
AVDD
9
10
7
50W
VOP
2
1
16
2
3
INP1
INN1
INP2
INN2
Controller
AINP
10nF(3)
VOCM
VON
3
10
8
MUX
PGA
REFOUT
AINN
DRDY
DIN
50W
1mF
1
8
4.7kW(2)
18
19
24
5
9
GPIO6
GPIO5
GPIO0
SYNCOUT
START
DOUT
SCLK
SPI
4
7
PGA280
ADS1259
12
6
1MW
DGND
CS
+3.3V
17 15 14 16 13 5(1)
1mF
19 15 14 11 12 13
1mF
100kW
(1) Refer to the PGA280 product data sheet for power-supply bypassing recommendations.
(2) Locate this resistor as close as possible to pin 5 of the ADS1259.
(3) C0G or film capacitor.
Figure 64. PGA280 Driving the ADS1259
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