ADS1259
SBAS424C –JUNE 2009–REVISED MARCH 2010
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SYNCOUT Pin
Connect the SYNCOUT pin to the SYNCIN pin of the PGA280, using a 4.7kΩ series resistor (placed close to the
ADS1259). The 1MΩ pull-down resistor is required when the ADS1259 is in power-down mode.
RESET/PWDN Pin
This pin must be high in normal operation. If it is desired to completely power down the device, or to have a
hardware reset control, then connect this pin to a controller. If these functions are not needed, tie the pin high.
(Note that the device can both be reset and SLEEP mode engaged by commands.)
START Pin
If it is desired to control conversions by pin, connect this line to the controller. Otherwise, this line can be tied
high to free-run conversions. The conversions can also be controlled by software commands. In this case, tie the
START pin low.
DRDY Pin
DRDY is an output that indicates when data are ready for readback. Note that the DOUT pin (and also the DRDY
register bit) indicates when data are ready as well, so DRDY connection to a controller is optional.
CS Pin
If the ADS1259 is a single device connected to the SPI bus, then CS can be tied low. Otherwise, for applications
where the ADS1259 shares the bus with another device, CS must be connected.
DOUT Pin
When the ADS1259 SPI is deselected (CS = 1), the DOUT pin is in 3-state mode. A pull-down resistor may be
necessary to prevent floating the controller input pin.
Miscellaneous Digital I/O
Avoid ringing on the digital inputs and outputs. Resistors in series with the trace driving end helps to reduce
ringing by controlling impedances.
SOFTWARE GUIDE
After the power supplies have fully established, allow a minimum of 216 system clocks before beginning
communication to the device. The registers can then be configured by commands via the SPI port. The following
steps detail a suggested procedure to initialize the ADS1259.
1. Send the SDATAC command <11h>. This command cancels the RDATAC mode. RDATAC mode must be
cancelled before the register write commands.
2. Send the register write command. The following example shows the register write as a block of nine bytes,
starting at register 0 (CONFIG0).
BYTES
DATA
OPERATION
1, 2
3
01000000, 00001000
00000101
Write register opcode bytes, starting at address 0, 9-byte block
CONFIG0; register data, bias the reference, SPI timeout
4
01010000
CONFIG1; checksum enabled, sinc2 filter selection, internal
reference
5
00000011
CONFIG2; Gate Convert mode, 60SPS
6, 7, 8
00000000, 00000000,
00000000
OFC[2:0]; 3 bytes for offset, no offset correction
9, 10, 11
00000000, 00000000,
01000000
FSC[2:0]; 3 bytes for gain, no full-scale correction
40
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