PCM9211
SBAS495 –JUNE 2010
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Table 35. REGISTER MAP (continued)
ADR
67h
68h
REGISTER DESCRIPTION
R/W
R/W
R/W
B7
B6
B5
B4
B3
B2
B1
B0
DIT Channel Status Data Buffer 5/6
DIT Channel Status Data Buffer 6/6
TXCS39
TXCS47
TXCS38
TXCS46
TXCS37
TXCS45
TXCS36
TXCS44
TXCS35
TXCS43
TXCS34
TXCS42
TXCS33
TXCS41
TXCS32
TXCS40
AOLRMTE
N
MOLRMTE
N
6Ah
Main Output and AUXOUT Port Data Mute Control
R/W
AOMUTAS MOMUTAS
RSV
RSV
AODMUT
MODMUT
6Bh
6Ch
6Dh
6Eh
6Fh
70h
71h
72h
73h
74h
75h
76h
77h
78h
79h
7Ah
7Bh
7Ch
7Dh
7Eh
Main Output Port, Output Source Setting
AUX Output Port, Output Source Setting
MPIO_B & Main Output Port Hi-Z Control
MPIO_C and MPIO_A Hi-Z Control
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
RSV
RSV
MOSSRC2
AOSSRC2
MPB2HZ
MPC2HZ
MPASEL0
RSV
MOSSRC1
AOSSRC1
MPB1HZ
MOSSRC0
AOSSRC0
MPB0HZ
RSV
MOPSRC2
AOPSRC2
BCKHZ
MOPSRC1
AOPSRC1
LRCKHZ
MOPSRC0
AOPSRC0
DOUTHZ
MPA0HZ
RSV
MPB3HZ
MPC3HZ
MPASEL1
RSV
SCKOHZ
MPA3HZ
MPBSEL0
MPA3SEL
MPC3SEL
MPC1HZ
MPC0HZ
MPA2HZ
MPCSEL2
MPA2SEL
MPC2SEL
MPA1HZ
MPIO_A, MPIO_B, MPIO_C Group Function Assign
MPIO_A, Flags/GPIO Assign Setting
MPBSEL2
MCHSRC1
MPB1SEL
MPBSEL1
MCHSRC0
MPB0SEL
MPCSEL1
MPA1SEL
MPC1SEL
MPCSEL0
MPA0SEL
MPC0SEL
MPIO_B, MPIO_C, Flags/GPIO Assign Setting
MPIO_A1, MPIO_A0 Output Flag Select
MPIO_A3, MPIO_A2 Output Flag Select
MPIO_B1, MPIO_B0 Output Flag Select
MPIO_B3, MPIO_B2 Output Flag Select
MPIO_C1, MPIO_C0 Output Flag Select
MPIO_C3, MPIO_C2 Output Flag Select
MPO1, MPO0 Function Assign Setting
GPIO I/O Direction control for MPIO_A, MPIO_B
GPIO I/O Direction control for MPIO_C
GPIO Output Data Setting for MPIO_A, MPIO_B
GPIO Output Data Setting for MPIO_C
GPIO Input Data Register for MPIO_A, MPIO_B
GPIO Input Data Register for MPIO_C
MPB3SEL
MPB2SEL
MPA1FLG3 MPA1FLG2 MPA1FLG1 MPA1FLG0 MPA0FLG3 MPA0FLG2 MPA0FLG1 MPA0FLG0
MPA3FLG3 MPA3FLG2 MPA3FLG1 MPA3FLG0 MPA2FLG3 MPA2FLG2 MPA2FLG1 MPA2FLG0
MPB1FLG3 MPB1FLG2 MPB1FLG1 MPB1FLG0 MPB0FLG3 MPB0FLG2 MPB0FLG1 MPB0FLG0
MPB3FLG3 MPB3FLG2 MPB3FLG1 MPB3FLG0 MPB2FLG3 MPB2FLG2 MPB2FLG1 MPB2FLG0
MPC1FLG3 MPC1FLG2 MPC1FLG1 MPC1FLG0 MPC0FLG3 MPC0FLG2 MPC0FLG1 MPC0FLG0
MPC3FLG3 MPC3FLG2 MPC3FLG1 MPC3FLG0 MPC2FLG3 MPC2FLG2 MPC2FLG1 MPB2FLG0
MPO1SEL3 MPO1SEL2 MPO1SEL1 MPO1SEL0 MPO0SEL3 MPO0SEL2 MPO0SEL1 MPO0SEL0
GIOB3DIR
RSV
GIOB2DIR
RSV
GIOB1DIR
RSV
GIOB0DIR
RSV
GIOA3DIR
GIOC3DIR
GPOA3
GPOC3
GPIA3
GIOA2DIR
GIOC2DIR
GPOA2
GPOC2
GPIA2
GIOA1DIR
GIOC1DIR
GPOA1
GPOC1
GPIA1
GIOA0DIR
GIOC0DIR
GPOA0
GPOC0
GPIA0
GPOB3
RSV
GPOB2
RSV
GPOB1
RSV
GPOB0
RSV
GPIB3
RSV
GPIB2
RSV
GPIB1
RSV
GPIB0
RSV
R
GPIC3
GPIC2
GPIC1
GPIC0
62
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