PCM9211
SBAS495 –JUNE 2010
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ELECTRICAL CHARACTERISTICS: Digital Audio I/F Receiver (DIR)
All specifications at TA = +25°C, VCC = VDD = VDDRX = 3.3 V, and VCCAD = 5 V, unless otherwise noted.
PCM9211
PARAMETER
TEST CONDITIONS
MIN
TYP
20
MAX
UNIT
DIR, COAXIAL INPUT AMPLIFIER (RXIN0 and RXIN1)
Input resistance
kΩ
VPP
mV
kHz
Input voltage
0.2
7
Input hysteresis
50
Input sampling frequency
216
DIR, BIPHASE SIGNAL INPUT and PLL
Normal mode
Wide mode
28
7
108
216
kHz
kHz
Input biphase sampling
frequency range
Input sampling frequency
accuracy
IEC60958-3 (2003-01)
IEC60958-3 (2003-01)
Level III (±12.5%)
IEC60958-3
Jitter tolerance
From biphase signal detection to error out
release (ERROR = L)
PLL lock up time(1)
100
ms
DIR, RECOVERED CLOCK and DATA
Serial audio data width
16
24
27.648
55.296
55.296
13.824
216
Bits
MHz
MHz
MHz
MHz
kHz
128fS
256fS
512fS
64fS
fS
0.896
1.792
3.584
0.448
7
System clock frequency
Bit clock frequency
LR clock frequency
fS = 48 kHz, SCKO = 256fS, measured
period jitter
System clock jitter
50
100
±5
ps, rms
%
System clock duty cycle
50% reference
±5
7
DIT
Output biphase sampling
frequency
216
kHz
128fS
256fS
512fS
64fS
fS
0.896
1.792
3.584
0.448
7
27.648
55.296
55.296
13.824
216
MHz
MHz
MHz
MHz
kHz
Input system clock frequency
Input bit clock frequency
Input LR clock frequency
OSCILLATOR CIRCUIT, XTI and XMCKO CLOCK
XTI source clock frequency
Frequency accuracy
24.576
24.576
MHz
ppm
%
–100
45
100
55
XTI input clock duty cycle
XMCKO frequency
MHz
%
XMCKO output duty cycle
50% reference
±5
±5
PCM OUTPUT PORT (SCKO, BCK, LRCK, DOUT)
System clock frequency
Bit clock output frequency
LR clock output frequency
128fS / 256fS / 512fS
0.896
0.448
7
55.296
13.824
216
MHz
MHz
kHz
64fS
fS
ROUTING
System clock frequency
Bit clock output Frequency
LR clock output frequency
128fS / 256fS / 512fS
0.896
0.448
7
55.296
13.824
216
MHz
MHz
kHz
64fS
fS
(1) PLL lock-up time varies with ERROR release wait time setting (Register 23h/ERRWT). Therefore, lock-up time in this table shows the
value at ERRWT = 11 as the shortest time setting.
6
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