PCM9211
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SBAS495 –JUNE 2010
Register 7Dh, GPIO Input Data Register for MPIO_A, MPIO_B
(Address: 7Dh, Read-Only)
DATA
Reg Name
Default Value
Memo
B7
GPIB3
N/A
B6
GPIB2
N/A
B5
GPIB1
N/A
B4
GPIB0
N/A
B3
GPIA3
N/A
B2
GPIA2
N/A
B1
GPIA1
N/A
B0
GPIA0
N/A
GPIB3: MPIO_B3 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIB2: MPIO_B2 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIB1: MPIO_B1 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIB0: MPIO_B0 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA3: MPIO_A3 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA2: MPIO_A2 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA1: MPIO_A1 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA0: MPIO_A0 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
Copyright © 2010, Texas Instruments Incorporated
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