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PCI6421 参数 Datasheet PDF下载

PCI6421图片预览
型号: PCI6421
PDF下载: 下载PDF文件 查看货源
内容描述: 双/单插槽的CardBus和UltraMedia控制器 [DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER]
分类和应用: 控制器
文件页数/大小: 204 页 / 849 K
品牌: TI [ TEXAS INSTRUMENTS ]
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5.2 ExCA Interface Status Register  
This register provides information on current status of the PC Card interface. An X in the default bit values indicates  
that the value of the bit after reset depends on the state of the PC Card interface. See Table 5−3 for a complete  
description of the register contents.  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Default  
ExCA interface status  
R
0
R
0
R
X
R
X
R
X
R
X
R
X
R
X
Register:  
Offset:  
ExCA interface status  
CardBus Socket Address + 801h:  
Card A ExCA Offset 01h  
Card B ExCA Offset 41h  
Type:  
Read-only  
Default:  
00XX XXXXb  
Table 5−3. ExCA Interface Status Register Description  
BIT  
SIGNAL  
TYPE  
FUNCTION  
This bit returns 0 when read. A write has no effect.  
7
RSVD  
R
CARDPWR. Card power. This bit indicates the current power status of the PC Card socket. This bit reflects  
how the ExCA power control register has been programmed. The bit is encoded as:  
6
5
CARDPWR  
READY  
R
0 = V  
1 = V  
and V  
and V  
to the socket are turned off (default).  
to the socket are turned on.  
CC  
CC  
PP  
PP  
This bit indicates the current status of the READY signal at the PC Card interface.  
R
R
0 = PC Card is not ready for a data transfer.  
1 = PC Card is ready for a data transfer.  
Card write protect. This bit indicates the current status of the WP signal at the PC Card interface. This signal  
reports to the PCI6x21/PCI6x11 controller whether or not the memory card is write protected. Further, write  
protection for an entire PCI6x21/PCI6x11 16-bit memory window is available by setting the appropriate bit  
in the ExCA memory window offset-address high-byte register.  
4
CARDWP  
0 = WP signal is 0. PC Card is R/W.  
1 = WP signal is 1. PC Card is read-only.  
Card detect 2. This bit indicates the status of the CD2 signal at the PC Card interface. Software can use  
this and CDETECT1 to determine if a PC Card is fully seated in the socket.  
3
2
CDETECT2  
CDETECT1  
R
R
0 = CD2 signal is 1. No PC Card inserted.  
1 = CD2 signal is 0. PC Card at least partially inserted.  
Card detect 1. This bit indicates the status of the CD1 signal at the PC Card interface. Software can use  
this and CDETECT2 to determine if a PC Card is fully seated in the socket.  
0 = CD1 signal is 1. No PC Card inserted.  
1 = CD1 signal is 0. PC Card at least partially inserted.  
Battery voltage detect. When a 16-bit memory card is inserted, the field indicates the status of the battery  
voltage detect signals (BVD1, BVD2) at the PC Card interface, where bit 0 reflects the BVD1 status, and  
bit 1 reflects BVD2.  
00 = Battery is dead.  
01 = Battery is dead.  
10 = Battery is low; warning.  
11 = Battery is good.  
1−0  
BVDSTAT  
R
When a 16-bit I/O card is inserted, this field indicates the status of the SPKR (bit 1) signal and the STSCHG  
(bit 0) at the PC Card interface. In this case, the two bits in this field directly reflect the current state of these  
card outputs.  
5−6  
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